Hi All, On the Interface Top Proposal page, Ernst and I have posted some examples. http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/InterfaceAndBundleEnhancements In Ernst's examples, he extracted the code from the Complex RTL Signal Based CPU Bus Interface and SPI Example to explore what the complete code example would look like. http://www.eda-twiki.org/twiki/pub/P1076/InterfaceAndBundleEnhancements/ComplexRTL.tar.gz http://www.eda-twiki.org/twiki/pub/P1076/InterfaceAndBundleEnhancements/SPI_Bus.tar.gz In my example, I took Ernst's SPI code and put a record signal in the package to emulate the port interfaces. It also demonstrates a record whose elements are being driven by different designs. Note only the MISO signal is resolved (std_logic_vector), all other signals in the record are unresolved. There is a compile script (Spi.do) that shows the compile order of the example. http://www.eda-twiki.org/twiki/pub/P1076/InterfaceAndBundleEnhancements/SimpleSpi.zip I put two other examples that support some of the concepts explored in Packages as an Interface Construct. These support the feasibility of a generic package or something similar being used as a higher level container for a behavioral interface construct. Both include compile scripts. http://www.eda-twiki.org/twiki/pub/P1076/InterfaceAndBundleEnhancements/package_as_interface.zip http://www.eda-twiki.org/twiki/pub/P1076/InterfaceAndBundleEnhancements/package_record_as_interface.zip Best Regards, Jim -- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Jim@SynthWorks.com VHDL Training Expert http://www.SynthWorks.com IEEE VHDL Working Group Chair OSVVM, Chief Architect and Cofounder 1-503-590-4787 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Wed Oct 21 23:30:49 2015
This archive was generated by hypermail 2.1.8 : Wed Oct 21 2015 - 23:30:56 PDT