Re: EXTERNAL: Re: [vhdl-200x] RE: Modular types

On 10 Aug 2014, at 12:25 am, whygee@f-cpu.org wrote:

> Le 2014-08-09 06:35, David Koontz a écrit :
> 
> Thanks David. I was hoping I was wrong in thinking GHDL was one of the
> few "not-performance oriented" simulators out there.
> Can you say if the implementations you have examined are "big names"
> or commercial ?

No, just what I had source code for and not all of those, it's work which is why I started searching literature. 

>> I'd agree packed bit vectors are likely an evolutionary dead end. If
>> you compare the effort to the incremental effort to implement Ada
>> style modular integers modular integers would win.
> 
> That's my opinion as well. Nobody uses bit vectors anyway,
> all the code I can see is std_(u)logic_vector.

The idea wouldn't be to use BIT types as a replacement for STD_LOGIC types, rather to use bit_vector instead of integers for uses inferring hardware.  It matches the expression in binary done by synthesis and bignum would come free.

It's really too bad there isn't a new VHDL implementation with packed bit vectors.  It'd give modular integers a run for their money. 

>> The point was not that bit vectors should be 'fixed', more that
>> performance is not a goal to which to tool vendors have been aspiring
>> and it's not a goal in the language definition either.
> 
> some big names claim "superior speed" but prevent you from
> disclosing benchmark results.

That and a buck fifty will get you a cup of coffee.

> One way to "fix" the overall situation is to add performance to
> the goals of the modular type. We can't wish it, yet leave it out
> of the spec, otherwise people in the future will say the same thing
> as today : "oh, it's slow, but it's not our responsibility, VHDL
> does not mention the word "speed" or "performance" in its definition."

I don't believe that performance has any place in the standard. It's platform as well as implementation specific.  


>> I'd also suggest you're unwise to count on native machine logical or
>> shift operator performance on modular integers either.  While
>> performance would be vastly superior to manipulating arrays of objects
>> implementation would more likely avoid redesign where possible. It's
>> mostly just another integer type.
> 
> I am not sure to understand, can you elaborate or give an example ?

Modular integer logical and shift operators might require new primitives unless they are implemented arithmetically in line (like the modulus reduction). Arithmetic implementation would be slower and bigger but requires no work across the simulator boundary. It still represents a significant speed increase, just not the greatest possible for an idealized implementation on a binary computer.

Numeric types are specified by value range in Ada and VHDL, not binary bits. Both languages could be implemented on decimal based computers (and bit_vectors would be guaranteed ineligible for speed up).



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