Re: [vhdl-200x] VHDL enhancements wish list

From: Jim Lewis <>
Date: Tue Feb 22 2011 - 09:48:54 PST

Hi Daniel,
> However, I beg to disagree on the following:
> As an aside, this is what I consider to be the irony of
> direct entity instantiation:
> * not well enough supported in synthesis to use for RTL
> * not configurable (architecture, ?generics?) so not too
> useful for testbenches
> I believe there is already sufficient synthesis support for direct
> entity instantiations, and even configurations.
> At least my synthesiser supports them. The only issue is
> that they don't work with each other.

Perhaps. I follow conservative coding practices - particularly
for issues that I can resolve by simple cut and paste and an extra
15 to 30 seconds per instance today.

Since we cannot talk about tools here, perhaps you could poll
comp.lang.vhdl to better support your claim of synthesis support
of configurations and direct entity instantiation.


Jim Lewis
Director of Training   
SynthWorks Design Inc. 
Expert VHDL Training for Hardware Design and Verification
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Received on Tue Feb 22 09:49:44 2011

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