RE: [vhdl-200x] Call for Vote: VHDL + VHPI (P1076c-2006-D2.4a)]

I vote YES.

Comments:
The standardization process has already been delayed for a very long
time since the actual technical work was completed.  Further delay would
send a negative message about our ability to move forward efficiently.
The amount of work required by the WG to go through the ballot process
should not be a big burden and we will benefit from an external review.

SystemC and SystemVerilog both benefited greatly from the IEEE process
both in terms of improved technical specifications and in terms of
improved market perception.  SPIRIT is moving the same direction and The
SPIRIT Consortium places high value on the IEEE process.  Their
expectation is that this will be a big plus for adoption and are
planning to publicize this aspect heavily.

VHDL will similarly benefit from the IEEE standardization process.  

 Regards,
   Victor

-----Original Message-----
From: owner-vhdl-200x@eda-stds.org [mailto:owner-vhdl-200x@eda-stds.org]
On Behalf Of Bailey, Stephen
Sent: Saturday, July 08, 2006 11:24 AM
To: Jim Lewis; vhdl-200x@eda-stds.org
Subject: RE: [vhdl-200x] Call for Vote: VHDL + VHPI (P1076c-2006-D2.4a)]

I vote NO.

Comments:
IEEE standardization is more involved than the Accellera approval
process.  To me, it makes no sense to go through IEEE standardization
for VHPI and then 6 months later start the process for the other
language enhancements that Accellera has recently or is in process of
reviewing and approving.  It will take 6 months to do the VHPI IEEE
ballot.  This mode of operation ensures that the better part of the next
year will be spent doing nothing but ballots in the IEEE.  Not very
efficient in my mind.

The Accellera version of the standard is sufficient for now.  SystemC,
SystemVerilog and SPIRIT did not require IEEE standardization before
they were supported.  The only requirement is user demand for the
capabilities.  IEEE standardization now or 6 months from now will make
no difference.

-Steve Bailey

> -----Original Message-----
> From: owner-vhdl-200x@server.eda-stds.org
> [mailto:owner-vhdl-200x@server.eda-stds.org] On Behalf Of Jim Lewis
> Sent: Friday, July 07, 2006 4:07 PM
> To: vhdl-200x@server.eda-stds.org
> Subject: [vhdl-200x] Call for Vote: VHDL + VHPI (P1076c-2006-D2.4a)]
> 
> Dear colleagues,
> This is a call for vote from IEEE P1076 WG members on the Accellera 
> approved revision of VHDL that includes VHPI plus some ISAC revisions.

> The purpose of this revision is to make VHPI available as a standard.

> As such, it does not have the additional revisions that were just 
> completed by the Accellera VHDL TC.  Those revisions will be put forth

> later
> (Q1 2007?).  This gives industry some time to tune up the revisions if

> necessary before they become an IEEE standard.
> 
> This revision has been reviewed and approved by both the Accellera 
> VHDL TC and the Accellera board.  We have a separate PAR for this work

> (P1076c).  Currently I am working on getting the ballot group formed.
> 
> Approval in this case shall mean that we accept this revision to be 
> the revision to send to IEEE for balloting.
> 
> The draft is numbered 2.4a by the Accellera VHDL TC and is available 
> at:
> http://www.accellera.org/apps/org/workgroup/vhdl/download.php/
> 488/P1076c-2006-2.4a.zip
> 
> Please forward votes to me by email (eg, by replying to this
> message) by 5pm US-PDT, Friday July 28, 2006.
> 
> Potential votes:  Approve, Negative with comment, Negative with no 
> comment, Abstain
> 
> Vote:
> 
> Comment:
> 
> 
> Best Regards,
> Jim Lewis
> VASG/ IEEE 1076 WG Chair
> 
> --
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Jim Lewis
> Director of Training             mailto:Jim@SynthWorks.com
> SynthWorks Design Inc.           http://www.SynthWorks.com
> 1-503-590-4787
> 
> Expert VHDL Training for Hardware Design and Verification 
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>