RE: [Fwd: [sv-champions] Email vote ending October 17]

My votes are listed below.

Stu
~~~~~~~~~~~~~~~~~~~~~~~~~~~
Stuart Sutherland

Sutherland HDL, Inc.

stuart@sutherland-hdl.com

503-692-0898
www.sutherland-hdl.com

From: owner-sv-champions@eda.org [mailto:owner-sv-champions@eda.org] On
Behalf Of Neil Korpusik
Sent: Monday, October 17, 2011 5:46 PM
To: sv-champions@eda.org
Subject: [Fwd: [sv-champions] Email vote ending October 17]

 
P1800 Champions,

We are conducting an email vote for mantis items that are in the resolved

state. There are 15 mantis items ready for the Champions. I have put 10

of them into this email vote.

Mark your votes as being either Approve or Oppose. If you Oppose, please

specify a reason. You have until October 17, midnight (PST) to cast your

votes.

Neil

1. 3564 <http://www.eda-twiki.org/svdb/view.php?id=3564> SV-AC Sec 9.2.2.2.1
needs to clarify whether variables read in an assertion contribute to the
sensitivity of an always_comb
There is a proposal (1 page)
Approved by voice vote 2011-09-27: 12y/0n/0a.

Approve __ Oppose _X_

I do not disagree with the changes made to always_comb, but the proposal
does not cover always_latch and always @*. It might be that no change is
needed for always_latch, since it follows the sensitivity list rules of
always_comb. I did not check the wording of always_latch to see if it is
OK. Certainly, though, the proposal needs to address whether the same new
rules do or do not apply to always @*

2. 3145 <http://www.eda-twiki.org/svdb/view.php?id=3145> SV-AC Need to
clearly define "maximal property"
There is a proposal (1 page)
Approved by voice vote 2011-09-27: 12y/0n/0a.

Approve __ Oppose _X_

I believe this proposal violates a subtle rule of IEEE standards. From the
IEEE style guideline (highlighting added):

Footnotes in text may be included in a standard only for information,
clarification, and aid in the use of the

standard. Mandatory requirements shall not be included in text footnotes
because these footnotes are not

officially a part of the standard, but they shall be included in the draft
that is submitted to the IEEE-SA

Standards Board. Note that footnotes to tables and figures follow different
rules (see 15.5 and 16.3).

Since the proposed new text contains definitions, it is my opinion that it
needs to be normative text in the main body of the document, not an
informative footnote.

3. 3046 <http://www.eda-twiki.org/svdb/view.php?id=3046> SV-EC Dotted names
within inlined constraints
There is a proposal (1 page)
Approved in sv-ec meeting 8/15/2011:proposal
3046_inline_dotted_names_rev3.pdf 1 No vote, 0 abstain.

Approve _X_ Oppose __

4. 1091 <http://www.eda-twiki.org/svdb/view.php?id=1091> SV-EC Jeda
verification enhancements
No change required
Unanimously voted in sv-ec email vote 9/26/2011 to be CLOSED as already
implemented in SystemVerilog.

Approve _X_ Oppose __

5. 3001 <http://www.eda-twiki.org/svdb/view.php?id=3001> SV-EC Proper
Polymorphic behavior of instantiation
There is a proposal (2 pages)
unanimously approved in email vote 9/26/2011

Approve _X_ Oppose __

Friendly Amendment: Some keywords are not properly bolded in the code
examples. That can be fixed as the proposal is implemented, and does not
need to be sent back to the EC, or have a new draft created.

6. 1523 <http://www.eda-twiki.org/svdb/view.php?id=1523> SV-BC How is ?:
defined for non-integral data types?
There is a proposal (2 pages)
On September 26, 2011 the SV-BC unanimously approved the revised proposal,
1523_rev5_shalom.pdf.

Approve _X_ Oppose __

7. 2987 <http://www.eda-twiki.org/svdb/view.php?id=2987> SV-EC Soft
Constraints
There is a proposal (5 pages)
Approved in sv-ec meeting, 9/26/2011, the proposal
Mantis2987_SoftConstraintsProposal_v5.pdf. 8 yes, 4 abstain, 1 no

Approve __ Oppose _X_

I agree with some of the other concerns that have been expressed about this
proposal during this Champions review.

From an editor's point of view, I am OK with the entirely new section not
being colored in blue, as the Editor Note above it states that the entire
section is new. However, the changes to the BNF are not at all clear as to
what is being changed verses added to the BNF.

Also, the way the example on page 2 is annotated is different than anywhere
else in the LRM (underlining portions of code and placing a label under the
annotation. This different style could be confusing, as the labels appear
to be code, but are not. The example could be formatted differently and the
annotations placed in comments.

8. 3724 <http://www.eda-twiki.org/svdb/view.php?id=3724> SV-DC Allow generic
interconnect for "typeless" connections
There is a proposal (10 pages)
Passed in e-mail vote that ended on 2011-09-30. 9y/0n/0a

Approve _X_ Oppose __

Friendly amendment. Quotation marks are used in several places in the text
where they should not be used (no person or document is being quoted).
These quote marks can be removed by the editor when the proposal is added to
the LRM.

9. 2476 <http://www.eda-twiki.org/svdb/view.php?id=2476> SV-AC Need
clarification about system functions $onehot, etc
There is a proposal (7 pages)
Amended proposal passed by voice vote 2011-08-30: 10y/0n/0a.
This was part of the Champion's email vote which ended on Sept 20, 2011. At
that time, some of the Champions needed more time to review it.

Approve _X_ Oppose __

10. 1356 <http://www.eda-twiki.org/svdb/view.php?id=1356> SV-EC Multiple
inheritance
There is a proposal (11 pages)
Proposal 1356_Interface_Classes_rev12.pdf was uanimously approved in sv-ec
9/12/2011 meeting.
This was part of the Champion's email vote which ended on Oct 2nd, 2011. At
that time, some of

Approve _X_ Oppose __

The following set was up for a previous vote, some Champions needed more
time. These will be part of another vote. I am listing these so that you are
aware that they still need attention.

11. 3033 <http://www.eda-twiki.org/svdb/view.php?id=3033> SV-AC Allow
procedural control statements is checkers
There is a proposal (19 pages)
12. 3069 <http://www.eda-twiki.org/svdb/view.php?id=3069> SV-AC Relax rules
for $global_clock resolution
There is a proposal (6 pages)
13. 2328 <http://www.eda-twiki.org/svdb/view.php?id=2328> SV-AC Review and
relax restrictions on data types in assertions
There is a proposal (9 pages)
14. 3113 <http://www.eda-twiki.org/svdb/view.php?id=3113> SV-AC Add
port_identifier to constant_primary BNF for sequences, properties and
checkers
There is a proposal (7 pages)
15. 3206 <http://www.eda-twiki.org/svdb/view.php?id=3206> SV-AC Deferred
assertions are sensitive to glitches
There is a proposal (6 pages)

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