[sv-champions] votes

Neil,
here are my votes.
Francoise
         '

 1. 3564<http://www.eda-twiki.org/svdb/view.php?id=3564> SV-AC Sec 9.2.2.2.1 needs to clarify whether variables read in an assertion contribute to the sensitivity of an always_comb
There is a proposal (1 page)
Approved by voice vote 2011-09-27: 12y/0n/0a.

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 2. 3145<http://www.eda-twiki.org/svdb/view.php?id=3145> SV-AC Need to clearly define "maximal property"
There is a proposal (1 page)
Approved by voice vote 2011-09-27: 12y/0n/0a.

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 3. 3046<http://www.eda-twiki.org/svdb/view.php?id=3046> SV-EC Dotted names within inlined constraints
There is a proposal (1 page)
Approved in sv-ec meeting 8/15/2011:proposal 3046_inline_dotted_names_rev3.pdf 1 No vote, 0 abstain.

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I would like that the 2 examples provided in the mantis item be added as illustrations to the proposal. These names resolutions are particularly difficult to interpret for a SV user. Any example for resolution hewlp understand the rules.

 4. 1091<http://www.eda-twiki.org/svdb/view.php?id=1091> SV-EC Jeda verification enhancements
No change required
Unanimously voted in sv-ec email vote 9/26/2011 to be CLOSED as already implemented in SystemVerilog.

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 5. 3001<http://www.eda-twiki.org/svdb/view.php?id=3001> SV-EC Proper Polymorphic behavior of instantiation
There is a proposal (2 pages)
unanimously approved in email vote 9/26/2011

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 6. 1523<http://www.eda-twiki.org/svdb/view.php?id=1523> SV-BC How is ?: defined for non-integral data types?
There is a proposal (2 pages)
On September 26, 2011 the SV-BC unanimously approved the revised proposal, 1523_rev5_shalom.pdf.

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 7. 2987<http://www.eda-twiki.org/svdb/view.php?id=2987> SV-EC Soft Constraints
There is a proposal (5 pages)
Approved in sv-ec meeting, 9/26/2011, the proposal Mantis2987_SoftConstraintsProposal_v5.pdf. 8 yes, 4 abstain, 1 no

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There are a couple of issues I found: a) the text does not follow the color coding schemes for the editor. It is unclear what is added
changed or removed.
b) expression_or_dist in the bnf now has "soft" qualifier. expression_or_dist are used in different production lile sequences, properties expressions etc...
Does the "soft" applies to all of those?
This should either be optional with a note that this does not apply to assertion expressions, or a different production for their use in constraints.

 1. 3724<http://www.eda-twiki.org/svdb/view.php?id=3724> SV-DC Allow generic interconnect for "typeless" connections
There is a proposal (10 pages)
Passed in e-mail vote that ended on 2011-09-30. 9y/0n/0a

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 2. 2476<http://www.eda-twiki.org/svdb/view.php?id=2476> SV-AC Need clarification about system functions $onehot, etc
There is a proposal (7 pages)
Amended proposal passed by voice vote 2011-08-30: 10y/0n/0a.
This was part of the Champion's email vote which ended on Sept 20, 2011. At that time, some of the Champions needed more time to review it.

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all the editorial notes should be in green color.

 3. 1356<http://www.eda-twiki.org/svdb/view.php?id=1356> SV-EC Multiple inheritance
There is a proposal (11 pages)
Proposal 1356_Interface_Classes_rev12.pdf was uanimously approved in sv-ec 9/12/2011 meeting.
This was part of the Champion's email vote which ended on Oct 2nd, 2011. At that time, some of

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The following set was up for a previous vote, some Champions needed more time. These will be part of another vote. I am listing these so that you are aware that they still need attention.

 4. 3033<http://www.eda-twiki.org/svdb/view.php?id=3033> SV-AC Allow procedural control statements is checkers
There is a proposal (19 pages)

 5. 3069<http://www.eda-twiki.org/svdb/view.php?id=3069> SV-AC Relax rules for $global_clock resolution
There is a proposal (6 pages)

 6. 2328<http://www.eda-twiki.org/svdb/view.php?id=2328> SV-AC Review and relax restrictions on data types in assertions
There is a proposal (9 pages)

 7. 3113<http://www.eda-twiki.org/svdb/view.php?id=3113> SV-AC Add port_identifier to constant_primary BNF for sequences, properties and checkers
There is a proposal (7 pages)

 8. 3206<http://www.eda-twiki.org/svdb/view.php?id=3206> SV-AC Deferred assertions are sensitive to glitches
There is a proposal (6 pages)

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