RE: [sv-sc] RE: [sv-champions] Mantis 1728 - let

I think it could be fairly considered an editorial issue.

 

n  Brad

 

From: owner-sv-champions@eda.org [mailto:owner-sv-champions@eda.org] On
Behalf Of Bresticker, Shalom
Sent: Thursday, July 24, 2008 10:31 PM
To: Bresticker, Shalom; Brad Pierce; sv-champions@eda.org
Cc: sv-sc@eda.org
Subject: RE: [sv-sc] RE: [sv-champions] Mantis 1728 - let

 

As a technical change recommendation, I'm afraid this requires to send
it back to SV-SC. If not for this, the other issues might be handled by
a bug note.

 

Shalom

	 

________________________________

	From: owner-sv-champions@server.eda.org
[mailto:owner-sv-champions@server.eda.org] On Behalf Of Bresticker,
Shalom
	Sent: Thursday, July 24, 2008 2:47 PM
	To: Brad Pierce; sv-champions@server.eda.org
	Cc: sv-sc@server.eda.org
	Subject: RE: [sv-sc] RE: [sv-champions] Mantis 1728 - let

	You're correct. I agree.

	 

	Shalom

		 

________________________________

		From: owner-sv-champions@server.eda.org
[mailto:owner-sv-champions@server.eda.org] On Behalf Of Brad Pierce
		Sent: Thursday, July 24, 2008 2:44 PM
		To: sv-champions@server.eda.org
		Cc: sv-sc@server.eda.org
		Subject: RE: [sv-sc] RE: [sv-champions] Mantis 1728 -
let

		Shalom,

		 

		(a+b) is already a primary, and its parentheses are no
guard against context-dependent effects.

		 

		Primary vs. Expression is a syntactic distinction, not a
semantic one.

		 

		n  Brad

		 

		From: Bresticker, Shalom
[mailto:shalom.bresticker@intel.com] 
		Sent: Thursday, July 24, 2008 7:38 PM
		To: Brad Pierce; sv-champions@eda.org
		Cc: sv-sc@eda.org
		Subject: RE: [sv-sc] RE: [sv-champions] Mantis 1728 -
let

		 

		Hmm,

			 

			--- 6 ---

			There are two module declarations that begin

			 

			    module m(input bit clock);

			 

			But there are, unfortunately, still no 2-state
wires in SystemVerilog, so these should be

			 

			    module m(input var bit clock);

			 

			[SB] or 'input logic clock' or simply 'input
clock', since there does notseem to be any need in the examples for
clock to be 2-state.

			 

			Also, example (f) has

			 

			module m(logic clock);

			 

			While not incorrect, this declares clock as
inout, which was probably not the intent.

			 

			More seriously, both examples (e) and (f) refer
to both "clock" and "clk". It needs to be consistent.

			 

			--- 7 ---

			"let_expression" should be added to "primary" in
A.8.4, not "expression" in A.8.3. 

			 

			[SB] I question that. Let expands to a
macro-like substitution and with parentheses. And that substitution
semantics is an essential part of let. As in the example in the
Motivation introduction, let c = a + b,when c is instantiated, a and b
are size-extended to the size of the context. Conversely, if a or b is
bigger than the size of the other nets and variables in the context of
the let instance, then those other nets and variables are size-extended
to the size of a or b, whichever is bigger. That is not consistent with
regarding a let_expression as a primary.

			 

			Regards,

			Shalom

	
---------------------------------------------------------------------
		Intel Israel (74) Limited
		 
		This e-mail and any attachments may contain confidential
material for
		the sole use of the intended recipient(s). Any review or
distribution
		by others is strictly prohibited. If you are not the
intended
		recipient, please contact the sender and delete all
copies.

		
		-- 
		This message has been scanned for viruses and 
		dangerous content by MailScanner
<http://www.mailscanner.info/> , and is 
		believed to be clean. 

	
---------------------------------------------------------------------
	Intel Israel (74) Limited
	 
	This e-mail and any attachments may contain confidential
material for
	the sole use of the intended recipient(s). Any review or
distribution
	by others is strictly prohibited. If you are not the intended
	recipient, please contact the sender and delete all copies.

	
	-- 
	This message has been scanned for viruses and 
	dangerous content by MailScanner <http://www.mailscanner.info/>
, and is 
	believed to be clean. 

---------------------------------------------------------------------
Intel Israel (74) Limited
 
This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.


-- 
This message has been scanned for viruses and 
dangerous content by MailScanner <http://www.mailscanner.info/> , and is

believed to be clean. 


-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.