[sv-champions] Champions 7-day email vote

SystemVerilog Champions,

I am calling for an email vote on the following Mantis items.
The email vote will run for 7 days, ending on February 23 at 11PM PST.

Please mark each Mantis item with your vote.
If you vote no, you must provide a reason.
I would like you to also provide a reason if you decide to abstain.


Neil

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List of Mantis items for a Champion's email vote:
-------------------------------------------------
1.  2249    Yes ___ No ___ Abstain ___
            SV-BC  11.4.3.1 merge issue on net and variable types

2.  2233    Yes ___ No ___ Abstain ___
            SV-EC  Allowed types for randc

3.  2229    Yes ___ No ___ Abstain ___
	    SV-EC  Clarify summary description for "inactive" random varaibles.

4.  2183    Yes ___ No ___ Abstain ___
            SV-EC  Only simple identifiers allowed in solve-before constraint

5.  2168    Yes ___ No ___ Abstain ___ 
	    SV-AC  Formal semantics for edge-sensitive clocks

6.  2150    Yes ___ No ___ Abstain ___ 
	    SV-AC  use of automatic variables in action block and subroutine 
		   calls should not be allowed

7.  2110    Yes ___ No ___ Abstain ___ 
	    SV-AC  Allow checkers in procedural for loops

8.  2106    Yes ___ No ___ Abstain ___  
	    SV-BC  Clarifications needed for declaration before use of objects 
                   and type

9.  2091    Yes ___ No ___ Abstain ___  
	    SV-AC  Need a clarification where concurrent assertions may appear

10. 1987    Yes ___ No ___ Abstain ___  
	    SV-AC  "verification statement" should be italicized and added to 
		   the glossary

11. 1932    Yes ___ No ___ Abstain ___ 
	    SV-AC  Introduce LTL and other temporal operators

12. 1830    Yes ___ No ___ Abstain ___ 
	    SV-AC  JEITA: A.2.10 There are no Sequence methods(ended, 
		   triggered, matched) in the BNF

13. 1827    Yes ___ No ___ Abstain ___ 
	    SV-BC  JEITA: 20.3.1 Update the OS Reference

14. 1772    Yes ___ No ___ Abstain ___ 
	    V-1364 inconsistent timecheck/timestamp condition terminology

15. 1769    Yes ___ No ___ Abstain ___ 
	    SV-AC  Elaboration time user assertion and error reporting tasks

16. 1758    Yes ___ No ___ Abstain ___ 
	    SV-AC  Boolean implication -> and equivalence <->

17. 1686    Yes ___ No ___ Abstain ___ 
	    SV-AC  assertion evaluation does not wait on subroutines

18. 1447    Yes ___ No ___ Abstain ___ 
	    SV-EC  Contradictory stmts about unsized array dimensions 
                (5.1 vs. 5.7 and 5.8)

19. 1340    Yes ___ No ___ Abstain ___ 
	    SV-BC  inconsistency between module ports and task arguments

20. 0675    Yes ___ No ___ Abstain ___ 
	    SV-BC  Ballot Feedback Issue 203: Packed unions shall not be 
                restricted to equal length items.