Date: Thu Apr 14 2011 - 10:00:25 PDT
ID<http://www.eda-twiki.org/svdb/view_all_set.php?sort=id&dir=DESC&type=2>
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Severity<http://www.eda-twiki.org/svdb/view_all_set.php?sort=severity&dir=DESC&type=2>
Status<http://www.eda-twiki.org/svdb/view_all_set.php?sort=status&dir=DESC&type=2>
Summary<http://www.eda-twiki.org/svdb/view_all_set.php?sort=summary&dir=DESC&type=2>
0002956<http://www.eda-twiki.org/svdb/view.php?id=2956>
Errata
SV-EC
text
completed (Steven Sharp)
clarify class 'process' definition (9.7 vs 18.13.3, 18.13.4, 18.13.5)
0002950<http://www.eda-twiki.org/svdb/view.php?id=2950>
Errata
SV-EC
major
completed (Françoise Martinolle)
virtual method prototype matching
0002949<http://www.eda-twiki.org/svdb/view.php?id=2949>
Errata
SV-EC
minor
completed (Jonathan Bromley)
LRM is silent about the semantics of referencing a clocking block output
0002451<http://www.eda-twiki.org/svdb/view.php?id=2451>
Clarification
SV-EC
major
completed (Steven Sharp)
Omitting body defaults
0001349<http://www.eda-twiki.org/svdb/view.php?id=1349>
Errata
SV-EC
feature
completed (Steven Sharp)
fork/join_none: what if parent thread terminates without blocking statement?
0003289<http://www.eda-twiki.org/svdb/view.php?id=3289>
Errata
SV-CC
text
completed (Jim Vellenga)
Miscellaneous editorial errors relating to DPI text
0003215<http://www.eda-twiki.org/svdb/view.php?id=3215>
Errata
SV-CC
minor
completed (Jim Vellenga)
vpiConstraintItem should also be an iteration method
0003193<http://www.eda-twiki.org/svdb/view.php?id=3193>
Errata
SV-CC
minor
completed (Chuck_Berking)
Need defined value for built-in class type process-class for vpiClassType property.
0003188<http://www.eda-twiki.org/svdb/view.php?id=3188>
Enhancement
SV-CC
minor
completed (Chuck_Berking)
No way to distinguish join, join_none, and join_any for fork-join blocks in VPI
0003116<http://www.eda-twiki.org/svdb/view.php?id=3116>
Errata
SV-CC
minor
completed
No method/transition path to get to typespecs of named events or named event arrays
0002359<http://www.eda-twiki.org/svdb/view.php?id=2359>
Errata
SV-CC
text
completed (Shalom Bresticker)
Example (Traversing expressions) should use vpiType instead of vpiExpr
0003231<http://www.eda-twiki.org/svdb/view.php?id=3231>
Errata
SV-BC
minor
completed (Thomas R Alsop)
Functions can contain the fork statement
0003225<http://www.eda-twiki.org/svdb/view.php?id=3225>
Errata
SV-BC
major
completed (Shalom Bresticker)
Footnote 18 is wrong, too restrictive
0002948<http://www.eda-twiki.org/svdb/view.php?id=2948>
Errata
SV-BC
text
completed (Shalom Bresticker)
Wrong example in protected envelope
0001170<http://www.eda-twiki.org/svdb/view.php?id=1170>
Clarification
SV-BC
minor
completed (Shalom Bresticker)
nonport declarations for identifiers mentioned in list_of_port_declarations
0003020<http://www.eda-twiki.org/svdb/view.php?id=3020>
Errata
SV-AC
minor
completed (John Havlicek)
Recursive property Restriction 4 is not consistent between Clause 16.13.17 and Annex F.7
0002955<http://www.eda-twiki.org/svdb/view.php?id=2955>
Errata
SV-AC
text
completed (Tapan Kapoor)
Checker example is wrong
0002732<http://www.eda-twiki.org/svdb/view.php?id=2732>
Clarification
SV-AC
minor
completed (John Havlicek)
Clarify timing diagram in Figure 16-4. Future value change
0002722<http://www.eda-twiki.org/svdb/view.php?id=2722>
Errata
SV-AC
minor
completed (Tom Thatcher)
Errors in Figures 16-14, 16-15, and 16-16
0002571<http://www.eda-twiki.org/svdb/view.php?id=2571>
Clarification
SV-AC
minor
completed (Scott Little)
confusing assertion clock inference rule
0002558<http://www.eda-twiki.org/svdb/view.php?id=2558>
Errata
SV-AC
minor
completed (Surrendra Dudani)
Restriction inside checker construct
0002551<http://www.eda-twiki.org/svdb/view.php?id=2551>
Errata
SV-AC
trivial
completed (Dmitry Korchemny)
trivial example error
0002494<http://www.eda-twiki.org/svdb/view.php?id=2494>
Errata
SV-AC
text
completed (Tapan Kapoor)
37.44 Assertion diagram missing restrict
0002485<http://www.eda-twiki.org/svdb/view.php?id=2485>
Errata
SV-AC
minor
completed (Surrendra Dudani)
terminology related to immediate and deferred assertions
0002479<http://www.eda-twiki.org/svdb/view.php?id=2479>
Errata
SV-AC
minor
completed (John Havlicek)
Annex F.5.2.1 conflicts with changes from 2434
0002362<http://www.eda-twiki.org/svdb/view.php?id=2362>
Errata
SV-AC
minor
completed (Scott Little)
16.14 mention of assertion control system tasks is unconnected
0002353<http://www.eda-twiki.org/svdb/view.php?id=2353>
Errata
SV-AC
minor
completed (Anupam Prabhakar)
'classes' missing from description
0003134<http://www.eda-twiki.org/svdb/view.php?id=3134>
Errata
SV-AC
minor
completed (Dana Fisman)
sequence and property range parameters are erroneously defined
0002938<http://www.eda-twiki.org/svdb/view.php?id=2938>
Clarification
SV-AC
feature
completed (Erik_Seligman)
Surprising (to some users) interaction between deferred assertions & short-circuiting
0002934<http://www.eda-twiki.org/svdb/view.php?id=2934>
Errata
SV-AC
major
completed (Anupam Prabhakar)
Precedence and associativity of case operator is not shown in the table
0002927<http://www.eda-twiki.org/svdb/view.php?id=2927>
Clarification
SV-AC
minor
completed (user199)
Precedence between sequence/property operator and normal expression operator
0002904<http://www.eda-twiki.org/svdb/view.php?id=2904>
Clarification
SV-AC
minor
completed (Dana Fisman)
Clarify when disable iff condition must occur relative to starting and ending of an attempt
0002871<http://www.eda-twiki.org/svdb/view.php?id=2871>
Errata
SV-AC
minor
completed (Anupam Prabhakar)
Clause 16 does not forbid assertion local variables within clocking event expressions
0002552<http://www.eda-twiki.org/svdb/view.php?id=2552>
Clarification
SV-AC
minor
completed (Dmitry Korchemny)
Confusing comments regarding nexttime operator
0002452<http://www.eda-twiki.org/svdb/view.php?id=2452>
Errata
SV-AC
minor
completed (Dana Fisman)
No vacuity information about synchronous aborts
0002330<http://www.eda-twiki.org/svdb/view.php?id=2330>
Errata
SV-AC
minor
completed (Lisa Piper)
Clarify that number_of_ticks argument to $past must be compile-time constant
0002291<http://www.eda-twiki.org/svdb/view.php?id=2291>
Errata
SV-AC
minor
completed (Lisa Piper)
the description of $assertoff blurs assertions and attempts
0002205<http://www.eda-twiki.org/svdb/view.php?id=2205>
Clarification
SV-AC
minor
completed (Erik_Seligman)
$asseroff, $assertkill and $asserton description is ambiguous
0001627<http://www.eda-twiki.org/svdb/view.php?id=1627>
Errata
SV-AC
minor
completed (Manisha_Kulshrestha)
17.16: clarify that expect statement not allowed in functions
Dave Rich
Verification Technologist
Mentor Graphics Corporation
New Office Number: 510-354-7439
[Description: Twitter-32]<http://www.twitter.com/dave_59> [Description: Technorati-32] <http://go.mentor.com/drich>
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