RE: [P1800] Agenda for the SystemVerilog Requirements Gathering Meeting

Here are the Intel Slide for the meeting.

Matt

--
Matt Maidment
mmaidmen@ichips.intel.com
 
>-----Original Message-----
>From: owner-ieee1800@eda.org [mailto:owner-ieee1800@eda.org] On Behalf Of
>Karen Pieper
>Sent: Thursday, February 18, 2010 8:06 PM
>To: IEEE 1800
>Subject: [P1800] Agenda for the SystemVerilog Requirements Gathering
>Meeting
>
>Hi, all,
>
>The Agenda for the SystemVerilog Requirements Gathering Meeting can be
>found at:
>
>http://www.eda-twiki.org/cgi-bin/view.cgi/P1800/P1800Agendas
>
>I have uploaded all but one of the presentations (it was too big).
>
>Presenters:  Please note the presentation time you have been allotted.
>There is not any slack in the schedule, so we need to run the meeting on
>schedule.  Be prepared to limit yourself to the time given.
>
>See you there!
>
>Karen
>
>
>
>
>--
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