-------------------------------------------------------------------------------
-- This is the resistor model.  It was written by Jim Lear at Cirrus Logic in
-- 2010 and is released directly to the public domain without copyright
-- restrictions. 
-------------------------------------------------------------------------------

library work;
use work.thevenin_pkg.all;

entity resistor is
  
  generic (
    r : real := 1.0);

  port (
    p, n : inout thevenin := (Vth => 0.0, Rth => real'right));

end resistor;

library work;
use work.thevenin_pkg.all;

architecture one of resistor is
  signal driven_p, driven_n : uthevenin := (rth => real'right, vth => 0.0);
begin  -- one

  -- purpose: drives the p output
  -- type   : combinational
  -- inputs : n
  -- outputs: p
  calc_p: postponed process (n)
    variable external_n : uthevenin;
  begin  -- process calc_p
    external_n := external_drive(n, driven_n);
    driven_p.rth <= external_n.rth+r;
    driven_p.vth <= external_n.vth;
  end process calc_p;

  -- purpose: drives the n output
  -- type   : combinational
  -- inputs : p
  -- outputs: n
  calc_n: postponed process (p)
    variable external_p : uthevenin;
  begin  -- process calc_p
    external_p := external_drive(p, driven_p);
    driven_n.rth <= external_p.rth+r;
    driven_n.vth <= external_p.vth;
  end process calc_n;

  p <= driven_p;
  n <= driven_n;

end one;
