RE: [sv-dc] 4-state vs 3-D

From: Scott Cranston <cranston@cadence.com>
Date: Fri Dec 10 2010 - 08:27:34 PST

I think we're trying to decide what is being modeled in real modeling and (a subdecision) what X means in that model.

 -- Scott

-----Original Message-----
From: owner-sv-dc@eda.org [mailto:owner-sv-dc@eda.org] On Behalf Of Lear, Jim
Sent: Friday, December 10, 2010 9:25 AM
To: 'sv-dc@eda.org'
Subject: RE: [sv-dc] 4-state vs 3-D

I'm not sure how important this is, but in the AMS world with boundary models (connect rules), an 'X' can also represent a Voltage that is between the zero- and one-threshold; the meta-stability region. This arises in the conversion from a known Voltage to a logic value.

I'm not sure exactly what we're trying to solve. Are we trying to decide between a "four state" and a "3-D" implementation? It's not clear what exactly is meant between the two. Would someone be kind enough to clarify?

Kindest Regards,
Jim Lear
Cirrus Logic
(512) 851-4612
(512) 293-7248 (mobile)

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
Received on Fri Dec 10 08:28:22 2010

This archive was generated by hypermail 2.1.8 : Fri Dec 10 2010 - 08:28:25 PST