RE: [sv-dc] sv-dc: please have a look

I believe this problem can be solved through the implementation capacitor loading model. Dynamic element modules, such as capacitors and inductors, will have a state that must be recalculated periodically. They can not be simply external event driven. These recalculations can be done on a fixed periodic basis, or they can be done based on some internal accuracy criteria.

In the first timing method, the capacitor must awaken at a regular predetermined period. It estimates the current that has flowed in since the last time point and produces a new voltage output. In order to produce an accurate threshold estimate, the time points will need to be frequent enough to provide the necessary time and voltage resolution.

Alternatively, the capacitor can be implemented so that it can estimate when thresholds will be reached and schedule a future time point based on the estimate. So the capacitor, knowing the resistance values of the external drivers, can project when the voltage in the capacitor will change enough to warrant a new time point calculation. It can even accurately estimate before hand when it will cross a threshold. The cap model can then schedule a waking event at some point in the future. If the driving value changes, then the capacitor can be awaken before the scheduled time point.

Everyone should be aware that one is effectively implementing a distributed simultaneous diff. eq. solver. This works fine for low-order systems, but high order systems with a large state space will pose stability and convergence problems without some clever thinking. It's a perfect research problem for some grad students or some R&D group, but well beyond the scope of this committee.

Kindest Regards,

Jim Lear

Cirrus Logic

(512) 851-4612

(512) 293-7248 (mobile)

________________________________

From: owner-sv-dc@eda.org [mailto:owner-sv-dc@eda.org] On Behalf Of Achim Bauer
Sent: Thursday, July 29, 2010 7:56 AM
To: sv-dc@eda.org
Subject: [sv-dc] sv-dc: please have a look

Hi everybody,

in yesterday´s discussion I tried to point out a crucial requirement for resolution of real-value nets.
Since this is VERY IMPORTANT FOR THE VERIFICATION

of weak/highZ drivers or critical/heavy/erroneous loading effects,
I illustrated the example once again for you ( it´s just a single page :)

Please have a look and let me know about your opinion !

Thanks, regards,
Achim

P.S. the doc is also available via google-link:

http://docs.google.com/fileview?id=0B3Q59OpAdnEcZGFkYjQ5ODctNGM1MC00ZTNmLTlmM2EtZjFlZGRkNjc4YmRh&hl=en&authkey=COPZqc8O

-- 
This message has been scanned for viruses and 
dangerous content by MailScanner <http://www.mailscanner.info/> , and is 
believed to be clean. 
-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.