Minutes of IEEE P1800 SV-AC meeting #2006-13: 08/01/2006
Written by: Ed Cerny

Code for the conference call:

        Domestic:         888-635-9997
        International:    763-315-6815
        Participant code: 2638198

Attendance Record
	Legend:
		x = attended
		- = missed
		r = represented
		. = not yet a member
		v = valid voter (3 out of last 4 or 75% overall)
		n = not valid voter

n[xxx-x-x-xx---] Faisal Haque (Cisco, Chairman)
v[xxx-xxxxxxxxx] Eduard Cerny (Synopsys - Co-chair)	
v[xxxxxxx--xxxx] John Havlicek (Freescale)
v[xxxxxxxxxxxxx] Doron Bustan (Freescale)
v[xxxxxxxx-xxxx] Manisha Kulshrestha (Mentor Graphics)
v[xxx---x-xx-x-] Volkan Esen (Infineon)
v[-xxx-xxxxxx-x] Bassam Tabbara (Synopsys)
v[-xxxx-xx-xx-x] Hillel Miller (Freescale)
v[-x--xxxxxx-xx] Surrendra Dudani (Synopsys)
v[-xxxx-xx-----] Joseph Lu (Altera)
 [.x-x------x--] Yaniv Fais (Freescale)
v[..xxxxxxxxxxx] Dmitry Korchemny (Intel)
 [....xxxxxxxxx] Lisa Piper (Cadence)
==============|-------------------------08/01/2006

Agenda:
-------

- Review IEEE working group rules
- Review errata reported in Mantis


Minutes:
--------

1) #1495: to be sent for vote by email.

2) #1532: to be sent for vote by email.

3) #1510: to be sent for vote by email.

4) #1420: Is the restriction #4 in the new proposal too restrictive so
that even the examples in the LRM are not correct anymore? Should
there be an additional mode for passing arguments to recursive
properties? The issue needs further analysis.

5) Items # 966, 1551, 805, 1549 to be discussed later...

6) Dmitry introduced the motivation for the enhancements to
SystemVerilog entered under #1530.

Next meeting: 08/22/2006 at 9 am PT (12 pm ET, 5 pm GMT).

NOTE : The next meeting is in 3 weeks rather than 2 weeks to
accommodate conferences and vacations, and to align with the original
2-week period.

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