Minutes of IEEE P1800 SV-AC meeting #4: 10/14/04
Written by: Ed Cerny

Next meeting: Thursday, 10/28/04 at 9am PT (12pm ET)

code for the conference call:

        Domestic: 888-635-9997
        International: 763-315-6815
        Participant: 274372#  (ARIFSA#)

Attendance Record
	Legend:
		x = attended
		- = missed
		r = represented
		. = not yet a member
		v = valid voter (3 out of last 4 or 75% overall)
		n = not valid voter

n[--xx] Faisal Haque (Cisco, Chairman)
v[xx-x] Arif Samad (Synopsys - Co-chair)	
v[xx-x] Surrendra Dudani (Synopsys)
v[xxxx] John Havlicek (Freescale)
v[xxxx] Joseph Lu (NVIDIA)
v[x---] Rishiyur Nikhil (Blue Spec)
v[xxxx] Bassam Tabbara (Novas)
v[-xxx] Manisha Kulshrestha (Mentor Graphics)
v[-x--] Hillel Miller (Freescale)
v[---x] Doron Bustan (Freescale)
v[xxxx] Eduard Cerny (Synopsys)
=====|---------------------------- 10/14/04

Agenda:
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- Review IEEE working group rules
- Review of proposals, voting on 1 of them.

Minutes:
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1) Faisal recalled IEEE rules of conduct. All are aware of them and
agreed to proceed.

Reminder:
Deadlines:
09/01/04 - Closure of errata list
09/12/04 - Prioritized list of errata sent to P1800
12/01/04 - Closure of errata list forwarded to P1800.


2) Review of proposals:
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179: Acceptance of posted resolution proposed by Arif, seconded by Surrendra: Unanimously accepted.
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194: Agreement that ended should be allowed on multiclock sequences, provided that the instantiation context clock is the same as the last clock of the sequence. Flow of clock through matched into the sequence not allowed - it is for multiclock sequences, clock flowing into it does not make sense. Flow of clock into the sequence through ended - after a discussion it was agreed that this is not necessary because the user can parameterize the sequence and provide the desired clock as an actual parameter when instantiating the sequence with ended. In this way it is also consistent with the treatment of clock flow into matched (not allowed). Delayed. John will prepare a proposal.
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195: Use of sequence.ended in disable iff - since ended is normally defined only in a context sampled by the specific clock edge, its truth/falsity cannot be determined throughout the entire simulation step. disable iff is asynchronous, hence if ended is part of more complex boolean expression it is not clear when to consider that expression valid. There is an alternative - use sequence.triggered which is a boolean valid throughout the simulation step. 

The issue appears to be more complex as the meaning of asynchronicity of disable iff is not clear in relation to the sampling clock. Bassam will introduce an errata. 

Following the resolution to the new errata Surrendra and Ed will prepare a proposal for issue 195.
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196: Requiring types arguments is not a simple errata as it would require extending the type system and seeing how it affects the rest of the language. Also, input / output / inout / ref specifications may not be meaningful. 
A possible solution may be to optionally allow type specifications for integral types. Open for further discussion.
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New issue : If sequences are passed as arguments to recursive properties, the language of the property may become irregular. 
John and Boron will introduce an errata and a proposal for restricting sequences as the actual arguments to recursive properties.
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230: Section 17.14 and Tables 17-4, 17-3 need some readjustment as they do not match. The correction of the examples as in the current proposal is not sufficient. Must also take into account clock flow. Needs more reflection on how to resolve how properties can acquire a clock.

4) Email votes:
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The following items can be voted upon by email:

180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193 (from John)

88, 126, 128, 129, 130, 142 (from Ed)

Faisal / Arif will send out the email ballots.


5) Next meeting: Thursday, 10/28/04 at 9am PT
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6) Meeting adjourned at 10h05 am PT.
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