Minutes SV-AC 12/02/2002
Written by: Stephen Meier

ATTN: Next SV-AC Meeting Jan 30 9:30-11AM PST 
	Dial-In = 888-830-6260
	Intl: 1-505-242-2420
	PartID = 908704

Legend:
x = attended
- = missed
r = represented
. = not yet a member
v = valid voter (3 out of last 4)
n = not valid voter

v[xxxxxxxx----x.] Faisal Haque (Cisco, Chairman)
v[xxxxxxxx-x-x-x] Steve Meier (Synopsys, Co-Chair)
v[--xxx-xxxxxxrx] Tom Fitzpatrick (Synopsys)
n[--x--x-x-x--xr] Tom Anderson (0-in)
n[-------------x] Jason Andrews (Axis)
v[xxxxxxx-xxx--x] Roy Armoni (Intel)
n[--xxx-xxxxxxxx] Gail Dagan (Intel)
v[xxxx-x-xxxrxx.] Surrendra Dudani (Synopsys)
v[xxxxxxxxxxrxrx] Cindy Eisner (IBM)
v[-xxx-rx-xxxrrx] Harry Foster (Verplex)
v[xxxxxrxx-xxx..] John Havlicek (Motorola)
v[xxxx-xx-xxxxx.] Richard Ho (0-in)
n[----x.........] Sagi Katz (Gallileo)
v[-xxxxxxxxxxrx-] Adam Krolnik (LSI)
n[x--xxx-x--xx-x] David Lacey (HP, OVL Chairman)
v[xxxxxxxxx---xx] Joseph Lu (Sun)
v[xxxxxxxx--xxxx] Erich Marschner (Cadence)
n[--x...........] Hillel Miller (Motorola)
n[-x-xxxxx-xxxx-] Prakash Narain (Real Intent)
n[---xxxxxxxxxx-] Rajeev Ranjan (Real Intent)
n[x-----xxxxxxx.] Ambar Sarkar (Paradigm Works)
n[---xxxx-x-x...] Richard Stolzman (Verplex)
v[xxx-x-xxxxxx-x] Andrew Seawright (0-in)
v[xxxxxxx-xrxxxx] Bassam Tabbara (Novas)
v[-xxxxx........] Yaron Wolfsthal (IBM)
n[x.............] Dage Singh (Mentor)
n[x.............] Glenn Wesley (consultant)
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1. LRM Review Process

Faisal discussed the review and issue resolution process.

Will review section by section over the coming week.

Meetings wil be held weekly at 9:30-11:30AM Pacific

Each meeting will start with issues proposed from prior sections reviewed and
issue status/voting.  The rest of meeting will review 3-4 sections.

Issues process
  I1: issue are generated by a motion, 2nd and a 3rd supporter
  I2: issue must be supported by a written proposal within 3 working days
  I3: issues will be voted by all members with attendance
  I4: issues can be promoted to major issue by an SV_AC member in attendance
  I5: major issues will be voted 1 per Accellera member company in valid attendance

2. Requirements Status

Steve walked through assertionRequirements3.1_status4.xls document which updates
the SV-AC on current view of the working document Rev 0.79.

A typo on line 58 was corrected, the resolution matches the SV-AC guidance (green).

3. Working document Review by {<section_number>} [initials]

Steve walked through Section 11.1-11.6.8 in the Re11.v0.79 document

{11.4} [AS]  Andrew posed question on whether there is restriction on relationship between the elements in the range [min:max].  Yes the value of min <= max.  It was clarified that the constant_range_expression is already defined in SystemVerilog LRM as a compile time constant.

{11.2} [BT] Bassam reminded on prior comment that this section needs more text explaining that the check is a non-blocking process.  The restriction to boolean expression needs to be more explicit.  Later Bassam commented that he feels immediate assertions should be left out of language because of limited value.  Bassam may propose this as issue later.

{11.6.1} [AS] Andrew had question on the statement"the sequence as a whole cannot be empty".  Steve indicated that the sequence should be corrected to indicate sequence_item.  There was active discussion of whether the restriction was appropriate.  This topic needs further semantic analysis.

{11.6.8} [JH] John had questions about when a vacous match occurs.  Surrendra indicated that if an attempt fails the time is when the attempt started.

[CE] Cindy asked whether sequence implication expressions can be combined with other sequence expressions.  The answer is yes since it is a sequence_expr then it can be used wherever sequence_expr appears in the BNF.  Cindy asked for an example to demonstrate a useful application. 

Meeting Concluded