RE: [sv-ac] RE: Call to vote: Due March 2 (resend, typo fix)

From: Kulshrestha, Manisha <Manisha_Kulshrestha@mentor.com>
Date: Mon Feb 28 2011 - 06:16:00 PST

Hi Scott,
 
I do not feel that strongly about it. I am fine if we do not want to
show bad coding style in the LRM.
 
Thanks.
Manisha

________________________________

From: Little Scott-B11206 [mailto:B11206@freescale.com]
Sent: Monday, February 28, 2011 7:21 PM
To: Kulshrestha, Manisha; ben@systemverilog.us
Cc: Korchemny, Dmitry; sv-ac@eda.org
Subject: RE: [sv-ac] RE: Call to vote: Due March 2 (resend, typo fix)

Hi Manisha:

 

The mantis states that "control_bits shall be a packed bit vector". As
a reader of the LRM I would expect any valid way to create a packed bit
vector will work. It is unclear to me why we think it is important to
highlight this specific rule. Do we believe it will be commonly used
with $countones? I think it is a poor coding style. Why would I write
2'b1 and then probably a comment to alert folks that this isn't a typo,
but an intentional use of the leading zero rule. Wouldn't 2'b10 be
simpler and a much better style?

 

Thanks,

Scott

 

From: Kulshrestha, Manisha [mailto:Manisha_Kulshrestha@mentor.com]
Sent: Sunday, February 27, 2011 11:17 PM
To: ben@systemverilog.us; Little Scott-B11206
Cc: Korchemny, Dmitry; sv-ac@eda.org
Subject: RE: [sv-ac] RE: Call to vote: Due March 2 (resend, typo fix)

 

Hi,

 

I would like to keep the example as it is to make it clear that padding
does apply in this case. It will be good to explain why bit '0' is also
getting included in the count.

 

Thanks.

Manisha

 

________________________________

From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of ben
cohen
Sent: Friday, February 25, 2011 11:35 PM
To: Little Scott-B11206
Cc: Korchemny, Dmitry; sv-ac@eda.org
Subject: Re: [sv-ac] RE: Call to vote: Due March 2 (resend, typo fix)

Scott,

Your suggestion is OK with me. It general, it is a better methodology to
fully specify the bits. However, the padding rule applies for literal
constants when the size of the unsigned number is smaller than the size
specified for the literal constant. If this is something we want to
clarify, then the 2'b1 example should be explained. It's up to us to
determine what we want to describe.

Ben

On Fri, Feb 25, 2011 at 9:51 AM, Little Scott-B11206
<B11206@freescale.com> wrote:

Hi Ben:

 

I don't think we need to use or reference the rules about how to handle
unspecified bits. That isn't the purpose of the section or example. We
should keep things simple and write 2'10. It is only one more
character.

 

Thanks,

Scott

 

From: ben cohen [mailto:hdlcohen@gmail.com]
Sent: Friday, February 25, 2011 11:47 AM
To: Little Scott-B11206
Cc: Korchemny, Dmitry; sv-ac@eda.org
Subject: Re: [sv-ac] RE: Call to vote: Due March 2 (resend, typo fix)

 

We could make a reference to section 5.7.1 Integer literal constants

That states: "If the size of the unsigned number is smaller than the
size specified for the literal constant, the unsigned number shall be
padded to the left with zeros. If the leftmost bit in the unsigned
number is an x or a z, then an x or a z shall be used to pad to the
left, respectively. If the size of the unsigned number is larger than
the size specified for the literal constant, the unsigned number shall
be truncated from the left."

 

Thus, - $countbits (expression, 2'b1) returns the number of bits in
expression having values 1 or 0.

Per 5.7.1, this is equivalent to $countbits (expression, 2'b01)

Ben Cohen

 

On Fri, Feb 25, 2011 at 9:24 AM, Little Scott-B11206
<B11206@freescale.com> wrote:

Mantis 2476 __X__ Yes ____ No

http://www.verilog.org/mantis/view.php?id=2476

http://www.eda-stds.org/mantis/file_download.php?file_id=4816&type=bug

 

Assuming that the following small issues are handled.

 

Is the statement:

- $countbits (expression, 2'b1) returns the number of bits in
expression having values 1 or 0.

I believe it is more clear if it reads 2'b10.

 

$isunknown is also provided for convenience and backward compatibility.
Why is not introduced and the equivalence defined with the rest of those
functions?

 

In the first part of the proposal the Sampled Value System Functions is
listed as section 20.13 and then in the last section it is listed as
20.14. I think it would be best to be consistent within the proposal.
Either assume the new section has been inserted or assume it is has not.
I am not sure which is best.

 

Mantis 2804 __X__ Yes ____ No

http://www.eda-stds.org/svdb/view.php?id=2804

http://www.eda-stds.org/mantis/file_download.php?file_id=4814&type=bug

 

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Received on Mon Feb 28 06:16:50 2011

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