[sv-ac] 3191: Allow sequence methods with sequence expressions

After more thoughts, I am *NOT* in favor of this proposition because it
could lead to bad coding style. sequences can be fairly complex with *and,
or, intersect, throughout, etc oeprators*). Passing all of that as an
argument is definitely NOT desirable.
Ben Cohen SystemVerilog.us

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3191:   Allow sequence methods with sequence expressions
Jacob:  Would allow passing sequence expressions as actual arguments
Ben:    On one hand it could be convenient.
       on the other hand it could lead to bad coding style.
On Tue, Feb 15, 2011 at 10:30 AM, Thomas J Thatcher <
thomas.thatcher@oracle.com> wrote:
> Minutes of SV-AC Meeting
> Date:  2011-02-08
> Time:  16:30 UTC (8:30 PST)
> Duration: 1.5 hours
>
>
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