[sv-ac] RE: New proposal uploaded for 2476

I have now uploaded a version that fixes this issue.

From: Bresticker, Shalom
Sent: Sunday, February 13, 2011 4:51 AM
To: Seligman, Erik; sv-ac@eda.org
Subject: RE: New proposal uploaded for 2476

Hi,

In the syntax excerpts, "::==" should be "::=".
The rest looks ok.

Regards,
Shalom

From: Seligman, Erik
Sent: Saturday, February 12, 2011 12:48 AM
To: Bresticker, Shalom; sv-ac@eda.org
Subject: RE: New proposal uploaded for 2476

I have posted a new version addressing Shalom's concerns at http://www.verilog.org/mantis/view.php?id=2476 .

From: Bresticker, Shalom
Sent: Tuesday, February 08, 2011 5:28 AM
To: Seligman, Erik; sv-ac@eda.org
Subject: RE: New proposal uploaded for 2476

Hi,

It looks good. However, $isunknown has disappeared.

Editorial comments:

1. Need to modify section 20.1 accordingly.

2. In "Syntax 20-9 - Bit vector system function syntax", in "$countones(expression)", the right closing parenthesis should be bold red as well as the left opening parenthesis.

3. $onehot0 should have no clocking event argument.

4. In the following sentence at the top of page 5, "The function $countbits returns an int equal to the number of bits in expression whose values are contained in control_bits," "expression" should be in Courier font as well as "control_bits".

5. In the last example, the line "always_comb begin :" has an extra colon at the end of the line and should be deleted.

Regards,
Shalom

From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of Seligman, Erik
Sent: Tuesday, February 08, 2011 12:02 AM
To: sv-ac@eda.org
Subject: [sv-ac] New proposal uploaded for 2476

Hi all-I've uploaded another version of this proposal at http://www.verilog.org/mantis/view.php?id=2476 .

In this one, I included the shift of the bit vector functions to chapter 20, and also eliminated the $bitshot in favor of simply using $countbits & adding more example.

Please take a look & send comments...

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