[sv-ac] RE: Call to vote: Due January 31

Hello Dmitry,

here is my vote:

Mantis 1933 _X___ Yes ____ No

http://www.eda-stds.org/svdb/view.php?id=1933

http://www.eda-stds.org/mantis/file_download.php?file_id=4737&type=bug

Mantis 2412 ____ Yes __X__ No

http://www.eda-stds.org/svdb/view.php?id=2412

http://www.eda-stds.org/mantis/file_download.php?file_id=4733&type=bug

I have a problem or misunderstanding of the inference wt the end of the long example:

checker check(input in1, input sequence s_f);

default clocking cb_checker;

always @(s_f)

$display("sequence triggered");

a4: assert property (a |=> in1);

endchecker

// e4 infers checker's default clocking cb_checker

check c1(e4.triggered, e4);

// e4 connected to port of a module instance infers default clocking cb
mod_adder ai1(e4.triggered);

Even though the checker is inlined in place f the instance, I think that it should infer the clock from the instantiation context for it actual arguments, exactly the same way as for the instance of mod_adder, i.e., from cb. Otherwise I fell it makes it confusing to the user.

Also, the default clocking cb_checker is not defined. What effective clock will it be?

Thanks,
ed

From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of Korchemny, Dmitry
Sent: Thursday, January 27, 2011 2:26 AM
To: sv-ac@eda.org
Subject: [sv-ac] Call to vote: Due January 31

-You have until 11.59 pm PDT, Monday, January 31, 2011 to respond

-An issue passes if there are zero NO votes and half of the eligible

  voters respond with a YES vote.

-If you vote NO on any issue, your vote must be accompanied by a reason.

  The issue will then be up for discussion during a future conference

call.

As of the January 25, 2011 meeting, the eligible voters are:

Laurence Bisht

Eduard Cerny

Ben Cohen

Tapan Kapoor

Scott Little

Manisha Kulshrestha

Anupam Prabhakar

Erik Seligman

Samik Sengupta

Tom Thatcher

Mantis 1933 ____ Yes ____ No

http://www.eda-stds.org/svdb/view.php?id=1933

http://www.eda-stds.org/mantis/file_download.php?file_id=4737&type=bug

Mantis 2412 ____ Yes ____ No

http://www.eda-stds.org/svdb/view.php?id=2412

http://www.eda-stds.org/mantis/file_download.php?file_id=4733&type=bug

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