[sv-ac] SV-AC Meeting Reminder

Date: 2010-10-19
Time: 16:00 UTC (9:00 PDT)
Duration: 1.5 hours

Dial-in information:
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Meeting ID: 38198

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Agenda:
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- Reminder of IEEE patent policy.
See: http://standards.ieee.org/board/pat/pat-slideset.ppt

- Minutes approval

- Champions Feedback:
Passed:
1. 2571 SV-AC confusing assertion clock inference rule
2. 1678 SV-AC Clarify that rewriting algorithm doesn't replace name
resolution.
3. 2494 SV-AC 37.44 Assertion diagram missing restrict
4. 2754 SV-AC P1800-2009 : Can clock change in conditional branch of
'if' operator
5. 2095 SV-AC Clarify meaning of distribution as condition for
"disable iff"
6. 2558 SV-AC Restriction inside checker construct
7. 2732 SV-AC Clarify timing diagram in Figure 16-4. Future value change

Friendly Amendments:
1. 2485 SV-AC terminology related to immediate and deferred assertions
2. 2353 SV-AC 'classes' missing from description

Failed:
1. 2205 SV-AC $asseroff, $assertkill and $asserton description is ambiguous
2. 1763 SV-AC The LRM does not define whether assertion control tasks
affect sequence methods and events
3. 2412 SV-AC Allow clock inference in sequences
4. 2938 SV-AC Surprising (to some users) interaction between deferred
assertions & short-circuiting

- Issue Resolution:
1675 - Only functions $onehot, $onehot0, and $isunknown are listed in
Syntx 19-12
        Close as no further change required? (Covered by 2476)
2328 - Review and relax restrictions on data types in assertions
2904 - Clarify when disable iff condition must occur relative to
starting and ending of an attempt
3135 - Verbal explanation of nexttime and always is misleading for
multiple clocks

- Enhancement progress update

- Vacuity Discussion

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