Re: [sv-ac] Draft for 3035 (Checker argument sampling) uploaded

How does this mantis solve your initial issue:
module m (…);
logic a;
always_comb begin
a = '1;
a1: assert #0 (a);
check c1(a);
a = '0;
end
// …
endmodule
checker check(x);
a1: assert #0 (x);
endchecker

Alos, change the "which" to "that
Each subexpression of the right-hand side of a checker variable assignment [
which] that does not contain a checker variable is sampled.

On Sun, Aug 15, 2010 at 1:11 AM, Korchemny, Dmitry <
dmitry.korchemny@intel.com> wrote:

> Hi all,
>
>
>
> I uploaded a draft of the proposal 3035 (More flexible definition of
> checker argument sampling).
>
> http://www.eda-stds.org/mantis/view.php?id=3035
>
> http://www.eda-stds.org/mantis/file_download.php?file_id=4456&type=bug
>
>
>
> This version is slightly different than the version I sent earlier to the
> “checker output arguments” working group.
>
>
>
> Thanks,
>
> Dmitry
>
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