[sv-ac] RE: Working groups (resend)

I have updated this info on our wiki at http://www.eda-twiki.org/cgi-bin/view.cgi/P1800/SystemVerilogAssertionCommittee .

From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of Korchemny, Dmitry
Sent: Wednesday, July 14, 2010 4:04 AM
To: sv-ac@eda.org
Subject: [sv-ac] Working groups (resend)

Hi all,

Tapan joined groups "Interface formals in checkers" and "Assertion system functions". Resending the updated list.

Real type support in assertions:

* Scott

* John

* Ben

* Ed

Output arguments in checkers

* Ben

* Dmitry

* John

* Laurence

* Anupam

* Ed

* Tom

Interface formals in checkers

* Ben

* Manisha

* Tom

* Tapan

Assertion system functions

* Erik

* Laurence

* Tapan

Clock inference in sequences

* Anupam

* Laurence

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