RE: [sv-ac] RE: SV-AC meeting minutes 2010-04-27

John,

I know that as you say, the intent is that the "compilation/elaboration time constant expressions can be passed as actual arguments to formals of sequences and properties and that the formals can be referenced in places where compilation/elaboration time constants are required."

Is this actually clearly and explicitly stated anywhere?

Thanks,
Shalom

________________________________
From: Havlicek John-R8AAAU [mailto:r8aaau@freescale.com]
Sent: Wednesday, April 28, 2010 9:09 PM
To: Surya Pratik Saha; Korchemny, Dmitry
Cc: Bresticker, Shalom; sv-ac@server.eda.org
Subject: RE: [sv-ac] RE: SV-AC meeting minutes 2010-04-27

Hi Folks:

There is something missing from this discussion. It was expressed in the SV-AC meeting that the intent of checker instantiation was that it behave like sequence and property instantiation with regard to the binding of actual arguments to formal arguments.

There is no question that compilation/elaboration time constant expressions can be passed as actual arguments to formals of sequences and properties and that the formals can be referenced in places where compilation/elaboration time constants are required.

See, for example, delay_arg_example on p. 328 of 1800-2009.

Following this lead, the checker formal can be bound to a compilation/elaboration time constant expression, and the checker formal can be referenced in places where compilation/elaboration time constants are required.

It should not be the case that all checker formal arguments are treated as compilation/elaboration time constants, but it is certainly true that they do not behave the same as module ports and parameter ports.

I have not checked the BNF to see if any relaxation is required.

J.H.
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