[sv-ac] Assertions System Function request for next SV Standard

Cliff's SV-AC Top Feature Request (referencing my slides from the
DVCon meeting):

(1) New system functions: $all_signals, $all_inputs,
$all_outputs, $all_inouts (slide 35)

Regards - Cliff

----------------------------------------------------
Cliff Cummings - Sunburst Design, Inc.
14355 SW Allen Blvd., Suite #100, Beaverton, OR 97005
Phone: 503-641-8446 / FAX: 503-641-8486
cliffc@sunburst-design.com / www.sunburst-design.com
World Class Verilog & SystemVerilog Training

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