Hi Folks: There has been work in the Accellera Verilog-AMS Committee to define requirements for Analog SVA (ASVA). As a part of that effort, the Freescale participants have been putting together a working document on one approach to defining realtime semantics for SVA sequences that allows extension to realtime sequence operators that we think are relevant for the ASVA work. Please find attached the latest revision of this document. Comments are welcome. Best regards, John Havlicek -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.
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