RE: [sv-ac] 16.16 Disable iff resolution // Question

From: Korchemny, Dmitry <dmitry.korchemny_at_.....>
Date: Wed Jul 22 2009 - 23:33:35 PDT
I agree with Shalom.

Dmitry

From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On Behalf Of Bresticker, Shalom
Sent: Thursday, July 23, 2009 7:58 AM
To: ben@systemverilog.us; sv-ac@server.eda.org
Subject: RE: [sv-ac] 16.16 Disable iff resolution // Question

No, it was not corrected.
However, I believe that it does not mean that checkers are excluded, as  17.2 says,
"Clock and disable iff contexts are inherited from the scope of the checker declaration".

I think you should file a Mantis.

Shalom

________________________________
From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On Behalf Of ben cohen
Sent: Thursday, July 23, 2009 1:05 AM
To: sv-ac@server.eda.org
Subject: [sv-ac] 16.16 Disable iff resolution // Question
16.16 Disable iff resolution:   .. Furthermore, the default extends to any nested module, interface, or
program declarations, and to nested generate blocks  ... The scope does not extend into any instances of modules,
interfaces or programs.
Should this be: ... Furthermore, the default extends to any nested module, interface, or
program declarations, checkers, and to nested generate blocks. ...The scope does not extend into any instances of modules,
interfaces, checkers, or programs.

Was this ever corrected? If not, does that mean that checkers are excluded?
Ben

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Received on Wed Jul 22 23:36:03 2009

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