RE: [sv-ac] rules for concurrent assertion clock in procedural code

From: Daniel Mlynek <daniel.mlynek_at_.....>
Date: Wed Jul 01 2009 - 02:43:15 PDT
Thank you for the answer.
 
If so then how should I interpret rule "b":  "No term in expression1 appears
anywhere else in the body of the procedure." concurent assertion definition
are exluded from this rule? Same if I would sample clk in assertion
expression i e:
 
default clocking dclk @(posedge clk);endclocking
//<<<-------  clk  used in default clocking
always @(negedge clk) begin                         //clk used in event
control in procedural code
            as1: assert property (a ##1 a);
            as2: assert property (@(posedge clk_s) clk && sig);
//<<<--------  clk used inside body of the procedure 

end        


 
DANiel

  _____  

From: Korchemny, Dmitry [mailto:dmitry.korchemny@intel.com] 
Sent: 1 lipca 2009 11:38
To: Daniel Mlynek; sv-ac@server.eda.org
Subject: RE: [sv-ac] rules for concurrent assertion clock in procedural code



Hi Daniel,

 

The clock of as1 is negedge clk. as1 inherits the clock from the event
control of the always procedure.

 

Regards,

Dmitry

 

From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On
Behalf Of Daniel Mlynek
Sent: Wednesday, July 01, 2009 12:21 PM
To: sv-ac@server.eda.org
Subject: [sv-ac] rules for concurent assertion clock in procedural code

 

Rules defined in :  16.15.6 Embedding concurrent assertions in procedural
code says:

"Within the event control of the procedure, there is exactly one event
expression that satisfies both of the following conditions:

a) The event expression is of the form edge_identifier expression1 [ iff
expression2 ] and is not a proper subexpression of an event expression of
this form.

b) No term in expression1 appears anywhere else in the body of the
procedure."

My question is - what would be the clock for assertion as1  - would it be
inherited from always procedure clock? I have doubts as "clk" is used in
both always procedure clock and as2 assertion clock. Is this violates rule
(b) ???

 

...
default clocking dclk @(posedge clk);endclocking
//<<<-------  clk  used in default clocking
always @(negedge clk) begin                         //clk used in event
control in procedural code
            as1: assert property (a ##1 a);
            as2: assert property (@(posedge clk) a ##1 a);
//<<<--------  clk used inside body of the procedure

end        
...

 

DANiel


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Received on Wed Jul 1 02:52:04 2009

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