Re: [sv-ac] Proposal updated for Mantis 2656 (Ballot Comment #84)

I will, if I had the rights.  But one thing we could change this text to
something like: From: Figure 16-4 shows that this property is violated at
time 80. The vertical arrows indicate the ticks of the global clock. The
error message $error("sig is not stable") is executed at time 90.
*
*
*TO: Figure 16-4 shows that this property is violated at time 80. The
vertical arrows indicate the ticks of the global clock. The error message
$error("sig is not stable") is executed at time 90. Note that
$falling_gclk(clk)
is evaluated to 1'b0 at time 80.
*
On Sun, May 3, 2009 at 1:28 PM, Korchemny, Dmitry <
dmitry.korchemny@intel.com> wrote:

>  I suggest to fill a Mantis item. It can be addressed after the LRM
> release.
>
>
>
> Dmitry
>
>
>
> *From:* ben cohen [mailto:hdlcohen@gmail.com]
> *Sent:* Sunday, May 03, 2009 11:22 PM
>
> *To:* Korchemny, Dmitry
> *Cc:* Thomas.Thatcher@sun.com; sv-ac@server.eda.org
> *Subject:* Re: [sv-ac] Proposal updated for Mantis 2656 (Ballot Comment
> #84)
>
>
>
> *[Korchemny, Dmitry] You are right regarding $falling_gclk(clk). But the
> LRM states: *Table 16-2 shows the values returned by the global clocking
> future sampled value functions for *sig* at different time moments.
>
> *[Ben Cohen]* Correct.  My issue is the readability for the user.  as a
> user, I stumbled on that Table because the timing samples emphasize the
> example, and *$falling_gclk(clk) *is an important element of that example.
> * *LRM states:
>
> *Table 16-2 shows the values returned by the global clocking future
> sampled value functions for sig at different time moments.*
>
> *The following assertion states that the signal may change only on falling
> clock:*
>
> *a1: assert property (@$global_clock $changing_gclk(sig)*
>
> *|-> $falling_gclk(clk))*
>
> *else $error(”sig is not stable”);*
>
> *Figure 16-4 shows that this property is violated at time 80. The vertical
> arrows indicate the ticks of the global clock. The error message $error("sig
> is not stable") is executed at time 90.*
>
> I don't want to make an issue of this, as it is not that important to me.
>  In terms of not showing all the timing events (20, 60, 70) it is
> interesting that 40 is shown.  As a reader, I wondered why 40 and not the
> other timing events? Was inconsistent.
>
> Anyway, my 2 cents .. We can leave the spec as is on that point.  But that
> section will throw a few readers for a loop trying to figure out the value
> of *$falling_gclk(clk) **and *why the failure at time 90, and why the
> other timing events are not shown.
>
> ----------------------
>
>     *[Korchemny, Dmitry] $falling_gclk(clk) is present in Table 16-2, and
> in your table it appears twice. I don’t think that we need to consider all
> ticks of the global clock in this table. If you disagree, you are welcome
> to  open a Mantis item with your suggestion. Unfortunately, we are not
> authorized to address it now.*
>
>  I have version IEEE P1800/D7a
>
> Below is the heading of Table 16.2.  I see $falling_gclk(sig),but
> not $falling_gclk(*clk*)
>
> Perhaps I am looking at an earlier version of the P1800-2009 .
>
> page 334:
>
> *Time $sampled(sig) $future_gclk(sig) $rising_gclk(sig) $falling_gclk(sig)
> $changing_gclk(sig) $steady_gclk(sig) *
>
> *[Korchemny, Dmitry] You are right regarding $falling_gclk(clk). But the
> LRM states: *Table 16-2 shows the values returned by the global clocking
> future sampled value functions for *sig* at different time moments.
>
>
>
> Since most designs use a single edge of the clock, rather thatn both edges,
> I suggest that we modify the example from:  global clocking @clk;
> endclocking
>
> To the following    global clocking @ (posedge clk); endclocking
>
> assert property(@$global_clock a);   // the assertion states that a is true
> at each tick of the global clock. In simulation, tThis assertion is
> logically equivalent to
>
>     assert property(@ (posedge clk)  a);
>
>  *[Korchemny, Dmitry] *I think that *global clocking @clk; endclocking*also makes sense. The global clock reflects the primary clock, and the
> primary clock normally should tick at least at each change of clk. Consider
> the following assertion: the clock always ticks. You can implement it as:
>
> assert property (@$global_clock $rising_gclk(clk)); (or $changing_gclk,
> $falling_gclk).
>
>  According to the definition you suggest this assertion will be violated,
> since the sampled value of clk is always 0 @(posedge clk).
>
>  * *
>
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