Re: [sv-ac] Proposal updated for Mantis 2656 (Ballot Comment #84)

From: ben cohen <hdlcohen_at_.....>
Date: Thu Apr 30 2009 - 12:43:18 PDT
*Two comments:*
*The table: *I find "Table 16-2—Global clocking future sampled value
functions" missing several entry points for the global clocking, and it is
also missing the entry for $falling_gclk(clk),  That last entry is needed
because the one of the points of this table is to demonstrate why the
violation is at time 80.  Without that entry, it is left as an exercise for
the reader to figure out how $falling_gclk(clk) fits into that table and
graph.   Attached is my suggested update to the table for your
considerations.

From LRM: *The following assertion states that the signal may change only on
falling clock:*
*   a1: assert property (@$global_clock $changing_gclk(sig)*
*      |-> $falling_gclk(clk))*
*     else $error(”sig is not stable”);*
*Figure 16-4 shows that this property is violated at time 80. The vertical
arrows indicate the ticks of the global clock. The error message $error("sig
is not stable") is executed at time 90.*
* *
*2656_global_clk_20090427.doc*
Since most designs use a single edge of the clock, rather thatn both edges,
I suggest that we modify the example from:
*              global clocking @clk; endclocking
To the following
             global clocking @ (posedge clk); endclocking
assert property(@$global_clock a);
the assertion states that a is true at each tick of the global clock. In
simulation, tThis assertion is logically
equivalent to
assert property(@ (posedge clk)  a);
*
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*On Mon, Apr 27, 2009 at 10:53 AM, Thomas Thatcher
<Thomas.Thatcher@sun.com>wrote:

> Hello everyone,
>
> I uploaded the proposal for Mantis 2656 that incorporates Erik's request to
> change "equivalent" to "logically equivalent".
>
> The file names are
>        2656_global_clk_20090427.doc
>        2656_global_clk_20090427.pdf
>
> Tom
>
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Received on Thu, 30 Apr 2009 12:43:18 -0700

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