RE: [sv-ac] 16.17.1 Semantic leading clocks for multiclocked sequences and properties

From: Stuart Sutherland <stuart_at_.....>
Date: Thu Sep 25 2008 - 08:46:42 PDT
All margin boxes are being removed in draft 7a as part of the preparation
for an IEEE review of the standard.  This type of editorial work is not
substantive, and does not need a Mantis item.
 
 
Stu
~~~~~~~~~~~~~~~~~~~~~~~~~
Stuart Sutherland
stuart@sutherland-hdl.com
+1-503-692-0898
www.sutherland-hdl.com


 
From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of
Korchemny, Dmitry
Sent: Thursday, September 25, 2008 7:26 AM
To: stuart@sutherland-hdl.com
Cc: sv-ac@eda.org; Neil.Korpusik@sun.com
Subject: [sv-ac] 16.17.1 Semantic leading clocks for multiclocked sequences
and properties
 
Hi Stu, Neil,
 
In 16.17.1 old margin boxes remained from previous drafts. Should I open a
new Mantis item to document this?
 
Dmitry
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Received on Thu Sep 25 08:48:27 2008

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