RE: [sv-ac] assertion action control tasks

From: Lisa Piper <piper_at_.....>
Date: Mon Mar 17 2008 - 11:24:19 PDT
My interpretation has always been the current evaluation attempts that
are in progress.

 

lisa

 

________________________________

From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of
Eduard Cerny
Sent: Monday, March 17, 2008 12:37 PM
To: sv-ac@eda.org
Subject: [sv-ac] assertion action control tasks

 

Hi,

 

the proposal and Draft 4 state

 

An assertion that is already executing, including execution of the pass
or

fail action, is not affected.

 

I am not sure how to interpret it. Does "executing" mean the current
evaluation attempts in flight or anything after the first leading clock
tick or after (implicit or explicit) asserton?

 

Thanks,

ed

 


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Received on Mon Mar 17 11:26:50 2008

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