Hi Folks: Our e-mail vote on 2088 failed due to negative vote. See the results below. J.H. ---------------------------------------------------------------------------------- Ballot on Mantis 2088 - Called on 2007-12-31, final ballots due by 2008-01-07 T 23:59-08:00. yv[xxxxxxxxxxxxxxxxxxx-xxxxxxxxxxxxxxxxxxxxxxxx-xx] Doron Bustan (Intel) yv[xxx--xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx-x] Eduard Cerny (Synopsys) n[--------------------x-xxx---------x-x-xxx-x---x] Surrendra Dudani (Synopsys) yv[xxxxxx-xxxxxx-xxxxxxxxx-xx-xxxxx-xxx-xxx-------] Yaniv Fais (Freescale) t[xx--xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx] John Havlicek (Freescale - Chair) nv[xxxxxxxxxxxxxxxxxxxxxxxxxxxxxrxxxxxxxxxxxxx-xxx] Dmitry Korchemny (Intel - Co-Chair) v[xxx-xxxxxxxxx-xxx-x--xx--xxxxx----------xx-xxxx] Manisha Kulshrestha (Mentor Graphics) n[----------------------------xxxxx-------x-xx-x-] Jiang Long (Mentor Graphics) n[-------x------------x--xxx.....................] Joseph Lu (Altera) v[xxxxxxxxxxxxxxxxx..............................] Johan Martensson (Jasper) n[-------------------------x--x-xx--xx-xxxxxxx-x-] Hillel Miller (Freescale) yv[xxx-xxxx-xxxxxxxxxxxxxxxxxxx-xxxxxxxx-xxxxxxxxx] Lisa Piper (Cadence) yv[xxxx-x-x-xx-xxxxxxx-x-xxxxx-x..................] Erik Seligman (Intel) n[-----x-x----x--------xxxx-----xxxx-xx----------] Tej Singh (Mentor Graphics) yv[xxxx-x-xxxxxx--xxxxxxxx-xxxxxxxxxxxxxxxxxxxxxxx] Bassam Tabbara (Synopsys) yv[xxxxxxx-xxxxxxxxxxxxx-xxxxxxxxxx...............] Tom Thatcher (Sun Microsystems) |----------------------------------------------- attendance on 2007-12-18 |------------------------------------------------- voting eligibility for this ballot |-------------------------------------------------- email ballots received Legend: x = attended - = missed r = represented . = not yet a member v = valid voter (2 out of last 3 or 3/4 overall) n = not a valid voter t = chair eligible to vote only to make or break a tie ---------------------------------------------------------------------------------- Rationale for Negative Vote [DK] Major comments: * Covergroup sampling in checkers require some clarification. In case when the clocking event refers to a checker variable, it will happen in the Observed region, and some checker variable will have their old values (those who evaluate before the variable in the clocking event) and others will have the new values already assigned. E.g., checkvar bit newclock =3D 0; checkvar bit a, b; assign a =3D regular_var_1; assign b =3D regular_var_2; always_check @clk newclock <=3D !newclock; covergroup cg1 @(newclock); ... // References to a and b endgroup Here you cannot tell what the evaluation order is: newclock, a, b; a, b. newclock, etc. Minor comments and friendly amendments: * Need to insert references to subclauses describing the covergroups. Page 2. * "Covergroup declarations and instances" -> "Covergroup declarations and instances." - missing the trailing dot. * The added text in the new section should be in blue. * A covergroup may reference either input signals of the checker or checker variables, including free variables." The term "input signals of the checker" is not defined. Is the intention about the input formal arguments? Also, why global variables defined elsewhere are disallowed in the covergroup? * Need to fix fonts throughout the document: Arial appears in many places instead of Times New Roman. Page 3. * "bins active =3D { [1'b1 };" -> "bins active =3D { 1'b1 };" ---------------------------------------------------------------------------------- Comments [BT] -strike out comment of VPI may need update. -relate to the proposal with the VPI update, and make sure we pass it in short order now that 1900 and 2088 are up. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Jan 8 04:37:37 2008
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