[sv-ac] RE: Revision of 1995

From: Kulshrestha, Manisha <Manisha_Kulshrestha_at_.....>
Date: Tue Dec 18 2007 - 09:41:50 PST
Hi Eric,

I like Dimitry's suggestion as this proposal does not need to say
anything about sampling of other variables. It just needs to concentrate
on loop iterators. Other variables will get covered in the other parts
of the LRM.

Thanks.
Manisha

-----Original Message-----
From: Seligman, Erik [mailto:erik.seligman@intel.com] 
Sent: Tuesday, December 18, 2007 11:04 PM
To: Korchemny, Dmitry; Kulshrestha, Manisha
Cc: sv-ac@server.eda.org
Subject: RE: Revision of 1995


Hmmm... But I also wanted to convey the idea that if you look at a
concurrent assertion in a loop, chances are that any variable you are
looking at is sampled, unless it's a loop iterator.  Is "most other
variables will be sampled" a problematic phrasing? 

-----Original Message-----
From: Korchemny, Dmitry 
Sent: Tuesday, December 18, 2007 9:31 AM
To: Seligman, Erik; 'Kulshrestha, Manisha'
Cc: 'sv-ac@server.eda.org'
Subject: RE: Revision of 1995

Hi Erik,

I suggest the following phrasing:

" The loop iterators do not use sampled values, but most other variables
will be sampled."

-->

"The loop iterators in the assertions are not sampled".

Thanks,
Dmitry

-----Original Message-----
From: Seligman, Erik
Sent: Tuesday, December 18, 2007 7:28 PM
To: Korchemny, Dmitry; Kulshrestha, Manisha
Cc: sv-ac@server.eda.org
Subject: Revision of 1995


I have just posted a fix for 1995.  Tell me if this matches what you
were thinking.

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Received on Tue Dec 18 09:42:28 2007

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