RE: [sv-ac] RE: New revision of 1995 (concurrent asserts in loops)

From: Seligman, Erik <erik.seligman_at_.....>
Date: Mon Dec 10 2007 - 09:05:31 PST
Thinking about it a little more, I think you're right.  I just reposted
the doc in Mantis, with that VPI change removed.
 
Lisa-- tell me if you see other areas where this would require a VPI
change.  But I think that ultimately, since we've decided that a
concurrent assert in a loop is ultimately being treated as a single
assertion, we're OK with the current VPI.
 


________________________________

From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On
Behalf Of Bassam Tabbara
Sent: Saturday, December 08, 2007 11:33 AM
To: Seligman, Erik; sv-ac@server.eda.org
Subject: [sv-ac] RE: New revision of 1995 (concurrent asserts in loops)


Hi Erik,
 
I think we don't need any changes to concurrent assertion diagram, the
loop vars are already accessible from the for loop model.
 
Thx.
-Bassam.
 

________________________________

From: Seligman, Erik [mailto:erik.seligman@intel.com] 
Sent: Friday, December 07, 2007 2:40 PM
To: sv-ac@eda.org
Cc: Bassam Tabbara
Subject: New revision of 1995 (concurrent asserts in loops)


 
Bassam-- can you review the VPI fix?  Thanks!
 
 
Erik Seligman

Formal Verification Architect

Corporate Design Solutions
Design Technology and Solutions

Intel Corporation

M.S. JF4-402                   
2111 NE 25th Ave
Hillsboro, OR 97124 

Phone:   (503) 712-3134

 

-- 
This message has been scanned for viruses and 
dangerous content by MailScanner <http://www.mailscanner.info/> , and is

believed to be clean. 

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
Received on Thu Dec 13 06:29:54 2007

This archive was generated by hypermail 2.1.8 : Thu Dec 13 2007 - 06:30:46 PST