Hi all, According to Stu's request I submitted a new Mantis item #2205 and added it to our active items. I also reported a new Mantis item #2206 concerning random simulation of free variables, following our discussion with Tom and added it to unscheduled items in the list. I am attaching the updated list. Please, let me know if you agree. Thanks, Dmitry -----Original Message----- From: Stuart Sutherland [mailto:stuart@sutherland-hdl.com] Sent: Thursday, November 15, 2007 11:03 AM To: Korchemny, Dmitry; sv-ac@server.eda-stds.org Subject: RE: [sv-ac] Assertion control question Dmitry, Thanks for responding. I had read that same section in the LRM before asking my question, but I interpret it differently. Since the text only refers to "assertions" and not "assertions directives", I think it excludes any directives that are not assertions. The "hint", as you put it, in the LRM is not definitive. I thought the deadline for determining what Mantis items will be worked on was November 15, so I would think that this could be added to the list--at least for a few more hours. Hopefully, it would be a simple fix that would not be something AC members would need to debate. Regardless, I would hope the AC has a Mantis item on this issue. Stu ~~~~~~~~~~~~~~~~~~~~~~~~~ Stuart Sutherland Sutherland HDL, Inc. stuart@sutherland-hdl.com 503-692-0898 > -----Original Message----- > From: owner-sv-ac@server.eda.org > [mailto:owner-sv-ac@server.eda.org] On Behalf Of Korchemny, Dmitry > Sent: Wednesday, November 14, 2007 11:34 PM > To: stuart@sutherland-hdl.com; sv-ac@server.eda-stds.org > Subject: RE: [sv-ac] Assertion control question > > Hi Stu, > > My understanding is that these tasks affect all the verification > statements. > I also think that immediate assertions are also affected; there is a > hint in the LRM: "When invoked with no arguments, the system > task shall > apply to all assertions" (Subclause 19.10). > > All this definitely needs a clarification in the LRM, but I > am not sure > whether we are allowed to work on new Mantis items now. > > Thanks, > Dmitry > > -----Original Message----- > From: owner-sv-ac@server.eda.org > [mailto:owner-sv-ac@server.eda.org] On > Behalf Of Stuart Sutherland > Sent: Thursday, November 15, 2007 3:13 AM > To: sv-ac@server.eda-stds.org > Subject: [sv-ac] Assertion control question > > > Do the $assertoff and related assertion controls and assertion action > controls only affect "assert" directives, or do they also affect > "assume", > and "cover" directives? What about immediate assertions? > > Stu > ~~~~~~~~~~~~~~~~~~~~~~~~~ > Stuart Sutherland > Sutherland HDL, Inc. > stuart@sutherland-hdl.com > 503-692-0898 > > > -- > This message has been scanned for viruses and > dangerous content by MailScanner, and is > believed to be clean. > --------------------------------------------------------------------- > Intel Israel (74) Limited > > This e-mail and any attachments may contain confidential material for > the sole use of the intended recipient(s). Any review or distribution > by others is strictly prohibited. If you are not the intended > recipient, please contact the sender and delete all copies. > > -- > This message has been scanned for viruses and > dangerous content by MailScanner, and is > believed to be clean. > > > --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.
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