RE: [sv-ac] notes from SV-AC meeting 2007-09-25

From: Seligman, Erik <erik.seligman_at_.....>
Date: Thu Sep 27 2007 - 08:09:55 PDT
My main worry was that actually doing this would require the new
generate block to have the same label as the original for loop, which
still exists in the rewritten code.  Is it legal to repeat the same
label in both a for loop and a generate block?  

Or are the restrictions we placed strong enough that we can consider the
entire original for loop to be rewritten as a generate, rather than
creating a new generate which just contains the assertions?


-----Original Message-----
From: John Havlicek [mailto:john.havlicek@freescale.com] 
Sent: Thursday, September 27, 2007 7:55 AM
To: Seligman, Erik
Cc: Seligman, Erik; sv-ac@eda-stds.org; Korchemny, Dmitry
Subject: Re: [sv-ac] notes from SV-AC meeting 2007-09-25

Hi Erik:

The concern is that there are already rules about how hierarchical names
are assembled from labeled blocks, loops in generates, etc.

The phrases "is logically equivalent to" and "the instance names of the
assumptions are based on the labels appearing in the original code" seem
to be saying that the rewrite does not produce the correct hierarchical
names.

There was discussion in the meeting that it would be good to construct
the rewrite so that the rules that already exist for labeled blocks,
loops in generates, etc. will produce the correct hierarchical names.

My intuition is that this can be done.

J.H.

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> Thread-Topic: [sv-ac] notes from SV-AC meeting 2007-09-25
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> From: "Seligman, Erik" <erik.seligman@intel.com>
> Cc: "Korchemny, Dmitry" <dmitry.korchemny@intel.com>
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> 
> Oops, forgot to mention which proposal I'm asking about!=20 I'm 
> referring to the comments on 1995 (asserts in loops).
> 
> -----Original Message-----
> From: Seligman, Erik=20
> Sent: Thursday, September 27, 2007 5:46 AM
> To: 'john.havlicek@freescale.com'; sv-ac@server.eda-stds.org
> Cc: Korchemny, Dmitry
> Subject: RE: [sv-ac] notes from SV-AC meeting 2007-09-25
> 
> Hi guys-- can someone describe in more detail the issues with the 
> example on p.2, mentioned in the notes, or point me to an LRM section?
> Thanks...
> 
> -----Original Message-----
> From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] 
> On Behalf Of John Havlicek
> Sent: Tuesday, September 25, 2007 11:43 AM
> To: sv-ac@server.eda-stds.org
> Subject: [sv-ac] notes from SV-AC meeting 2007-09-25
> 
> Hi Folks:
> 
> My notes from today's meeting are attached.
> 
> Please let me know if corrections are required.
> 
> J.H.
> 
> --=20
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Received on Thu Sep 27 08:10:17 2007

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