[sv-ac] result of vote on 1681

Hi Folks:

Mantis 1681 was passed by e-mail vote.  See the results below.

There was a friendly amendment from Tom:

   In light of the recent e-mail exchange, discussing the importance of the
   global clock to simulation, the following sentence from 14.13 should be
   deleted or modified:
   
      "The main purpose of global clocking is to specify which clocking
       event corresponds to the primary clock used in formal verification."

There was also an explanation of abstention from Lisa:

   I am going to abstain from voting on this. The reason is that this is
   not going to cause implementation hardships, however I also don't think
   it solves any problem. 
   
   I believe that the kind of properties that would use this really need to
   be evalutated on every timestep in simulation, similar to the PSL event
   control @(true). While I understand that @(true) has a different meaning
   is SVA, I think something similar is what is needed for simulation
   purposes because often a faster clock does not exist. (If there was a
   way to define the global clcok as the simulation timestep,then I would
   like this.)
   
   I see that with a proper methodology this global clock could be used by
   a formal tool, but as Johan stated, more is sometimes needed.


J.H.


------------------------------------------------------------------------------

Ballot on Mantis 1681

- Called on 2007-09-06, final ballots due by 2007-09-13 T 23:59-07:00(PDT).

yv[xxxxx-xxxxxxxxxxxxxxxxxxxxxxxx-xx] Doron Bustan (Intel)
yv[xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx-x] Eduard Cerny (Synopsys)     
 n[------x-xxx---------x-x-xxx-x---x] Surrendra Dudani (Synopsys)
yv[xxxxxxxxx-xx-xxxxx-xxx-xxx-------] Yaniv Fais (Freescale)
 t[xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx] John Havlicek (Freescale - Chair)
yv[xxxxxxxxxxxxxxxrxxxxxxxxxxxxx-xxx] Dmitry Korchemny (Intel - Co-Chair)
 v[xxx-x--xx--xxxxx----------xx-xxxx] Manisha Kulshrestha (Mentor Graphics)
 n[--------------xxxxx-------x-xx-x-] Jiang Long (Mentor Graphics)
 n[------x--xxx.....................] Joseph Lu (Altera)
yv[xxx..............................] Johan Martensson (Jasper)
 n[-----------x--x-xx--xx-xxxxxxx-x-] Hillel Miller (Freescale)
 v[xxxxxxxxxxxxxx-xxxxxxxx-xxxxxxxxx] Lisa Piper (Cadence)
yv[xxxxx-x-xxxxx-x..................] Erik Seligman (Intel)
 n[-------xxxx-----xxxx-xx----------] Tej Singh (Mentor Graphics)
 v[-xxxxxxxx-xxxxxxxxxxxxxxxxxxxxxxx] Bassam Tabbara (Synopsys)
yv[xxxxxxx-xxxxxxxxxx...............] Tom Thatcher (Sun Microsystems)
   |--------------------------------- attendance on 2007-09-04
 |----------------------------------- voting eligibility for this ballot
|------------------------------------ email ballots received



	Legend:
		x = attended
		- = missed
		r = represented
		. = not yet a member
		v = valid voter (2 out of last 3 or 3/4 overall)
		n = not valid voter
                t = chair eligible to vote only to make or break a tie

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