[sv-ac] New 1900 proposal: Feedback

Hello Everyone,

I saw that there was a new proposal for Mantis 1900 uploaded on Aug 20.  I
have a couple of feedback items:

First, in the list of constructs that may appear in the checker, an initial
block is included, but not a final block.  I believe this is an oversight, and
shouldn't be too much trouble to include.  This allows checks to occur at the
end of simulation.

It's not specifically mentioned, by immediate assertions may be included too,
correct?  They will be very good for checks in the final block.

On page 5:
> · If a free variable is declared with an initial value, this value is only valid until its first clocked
> assignment is triggered. If it has both an initial value and a continuous assignment, that is an SAR
> violation, and thus illegal. If it has an initial value and no clocked or continuous assignment, then it
> has that initial value at the start of simulation, but is assigned a nondeterminstic value at the first
> global clock edge.
  ^^^^^^
Should this be "inferred clock edge"?  What happens if I don't have a global
clock definition?


Next, I have a question.  Would there be a way to use the result of a checker
to control another checker?  If I am writing a series of complicated checkers,
I might want to encapsulate common functionality in a checker, then
instantiate that checker in the top-level checker that I am writing.  The
results of the common checker would be used to enable or otherwise control
assertions or other checkers instantiated within the top-level checker.

Currently, checkers as defined in this proposal have no outputs, so the only
way I see to do this would be through cross-module references.

Thanks,

Tom
-- 
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Thomas J. Thatcher
Sun Microsystems
408-616-5589
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