RE: [sv-ac] call to vote on Mantis 1361

Hi shalom,

The wording in the 19.10 is already consistent with it in draft3a. So,
I'll make the wording same as 19.10 in this new section.

Manisha

-----Original Message-----
From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On
Behalf Of Bresticker, Shalom
Sent: Wednesday, July 25, 2007 12:54 PM
To: john.havlicek@freescale.com; sv-ac@server.eda-stds.org
Subject: RE: [sv-ac] call to vote on Mantis 1361

If this is going to be the wording in a new 19.11, the wording of the
corresponding paragraph in 19.10 should be consistent with it.

Thanks,
Shalom
 

> - Change
> 
>      When the system task is specified with arguments, the first
>      argument indicates levels of the hierarchy, consistent with the
>      corresponding argument to the Verilog $dumpvars system
>      task. Subsequent arguments specify which scopes of the model to
>      control. These arguments can specify entire scopes (module,
>      program, interface, always block or initial block) or individual
>      assertions. Please refer to 20.7.1.2 for the definition of
>      $dumpvars.
> 
>   to
> 
>      When the system task is specified with arguments, the first
>      argument indicates levels of the hierarchy, consistent with the
>      corresponding argument to the $dumpvars system task (see
>      20.7.1.2). Subsequent arguments specify which scopes of the model
>      to control. These arguments can specify entire scopes (module,
>      program, interface, always block or initial block) or individual
>      assertions.

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