RE: [sv-ac] call to vote on Mantis 1674

Hi Manisha,

Please, see my comments below.

Thanks,
Dmitry

-----Original Message-----
From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On
Behalf Of Kulshrestha, Manisha
Sent: Friday, April 20, 2007 11:47 PM
To: john.havlicek@freescale.com; sv-ac@server.eda-stds.org
Subject: RE: [sv-ac] call to vote on Mantis 1674

Hi,

I see two issues with this proposal:

1. There is no mention about what is the inferred disable condition in
case there is no default disable. The proposal says: The inferred
disable expression is the reset expression from the default disable
expression (See 17.14 Note to
editor: This is after introducing proposal #1648).". What happens when
there is no default disable ??

[Korchemny, Dmitry] I see in the latest proposal the following sentence:
" If there is no default disable expression defined, the function
$inferred_disable returns false." This should answer your question.

2. I see some inconsistency in example a4. It is using $inferred_clock
in two places (clkx is inferred clock and there is explicit $inferred
clock before 'z'). When it replaces inferred clock for clkx, it says
that it is being replaced by default clocking, but for the
$inferred_clock before 'z', it uses clock flow rules.

In the proposal it says "The inferred clocking event expression is the
current resolved event expression that can be used in a clocking
event definition. It is obtained by applying clock flow rules to the
point where $inferred_clock is called.
If there is no current resolved event expression, then $inferred_clock
returns false (i.e., 1'b0).".

Since clkx is being used after clkw, the inferred clock should be same
as clkw ??

[Korchemny, Dmitry] Yes, this definition needs to be refined.

If clkx was the first clock in the property expression then it should
have been default clock ?

Also, what does it mean that $inferred clock returns false ? Does it
mean, it is an error ? Or you simply replace clock expression by 1'b0
(which will make property useless). I think this case should result in
error and proposal should say that clearly.

[Korchemny, Dmitry] I agree.

Thanks.
Manisha

-----Original Message-----
From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On
Behalf Of John Havlicek
Sent: Wednesday, April 18, 2007 4:20 AM
To: sv-ac@server.eda-stds.org
Subject: [sv-ac] call to vote on Mantis 1674

All:

This is the call to vote on the proposal for Mantis 1674.

As discussed in our meeting, this vote runs longer than 
the usual week because we have so many e-mail ballots 
running concurrently.

Please vote if you are eligible.  See the details below.

J.H.

Ballot on Mantis 1674

- Called on 2007-04-18, final ballots due by 23:59 PDT on 2007-04-30.

 v[xxxxxxxxxxxxxxxxxxx-xx] Doron Bustan (Freescale)
 v[xxxxxxxxxxxxxxxxxxxx-x] Eduard Cerny (Synopsys)	
 n[---------x-x-xxx-x---x] Surrendra Dudani (Synopsys)
 v[x-xxxxx-xxx-xxx-------] Yaniv Fais (Freescale)
 t[xxxxxxxxxxxxxxxxxxxxxx] John Havlicek (Freescale - Chair)
 v[xxxxrxxxxxxxxxxxxx-xxx] Dmitry Korchemny (Intel - Co-Chair)
 v[xxxxx----------xx-xxxx] Manisha Kulshrestha (Mentor Graphics)
 n[---xxxxx-------x-xx-x-] Jiang Long (Mentor Graphics)
 n[x.....................] Joseph Lu (Altera)
 n[x--x-xx--xx-xxxxxxx-x-] Hillel Miller (Freescale)
 v[xxx-xxxxxxxx-xxxxxxxxx] Lisa Piper (Cadence)
 v[xx-x..................] Erik Seligman (Intel)
 n[-----xxxx-xx----------] Tej Singh (Mentor Graphics)
 v[xxxxxxxxxxxxxxxxxxxxxx] Bassam Tabbara (Synopsys)
 v[xxxxxxx...............] Tom Thatcher (Sun Microsystems)
   |---------------------- attendance on 2007-04-17
 |------------------------ voting eligibility for this ballot
|------------------------- email ballots received


	Legend:
		x = attended
		- = missed
		r = represented
		. = not yet a member
		v = valid voter (2 out of last 3)
		n = not valid voter
                t = chair eligible to vote only to make or break a tie

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