RE: [sv-ac] Mantis 1674 proposal - Inferred value functions

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Thu Feb 22 2007 - 04:57:58 PST
  

Define it as you wish as long as a simulator can implement the
specification. Simulators don't understand synthesis.

Shalom

 

________________________________

From: Eduard Cerny [mailto:Eduard.Cerny@synopsys.com] 
Sent: Thursday, February 22, 2007 2:56 PM
To: Bresticker, Shalom; sv-ac@eda-stds.org
Subject: RE: [sv-ac] Mantis 1674 proposal - Inferred value functions

 

Hi,

I guess we'll have to write it only by referring to the form of the
event expression.  Would that work?

ed

 

	 

	
________________________________


	From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf
Of Bresticker, Shalom
	Sent: Thursday, February 22, 2007 4:45 AM
	To: sv-ac@eda-stds.org
	Subject: [sv-ac] Mantis 1674 proposal - Inferred value functions

	Hi,

	I glanced over the proposal for Mantis 1674. I see that it says,

	"The disable condition can only be inferred from a synthesizable
synchronous always block with asynchronous reset or from always_ff with
asynchronous reset."

	This statement is problematic. The LRM does not define anywhere
what is synthesizable, and rightly so, because 

	1.    This is not a standard for synthesis.

	2.    What is synthesizable is constantly expanding.

	3.    What is synthesizable varies from tool to tool.

	I don't think this statement can remain as it is.

	Regards,

	Shalom

	 

	Shalom Bresticker

	Intel Jerusalem LAD DA

	+972 2 589-6852

	+972 54 721-1033 

	 

	
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Received on Thu Feb 22 04:59:08 2007

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