RE: [sv-ac] 1547 review

From: Lisa Piper <piper_at_.....>
Date: Wed Feb 21 2007 - 08:57:38 PST
Dave,

 

I don't understand the link between the clocking block and a package?
Can you explain?

 

Lisa

 

-----Original Message-----
From: Rich, Dave [mailto:Dave_Rich@mentor.com] 
Sent: Wednesday, February 21, 2007 11:49 AM
To: Bassam Tabbara; Lisa Piper; sv-ac@eda-stds.org
Subject: RE: [sv-ac] 1547 review

 

I see little point in having properties or assertions in a clocking

block as there is already another way to associate a clock with a set of

assertions.

 

always @(posedge clk) // or @(cb) is there is an existing clocking block

      begin

      assert property (p1);

      assert property (p2);

      end

 

There's no requirement that there has to be a procedural statement in an

always block.

 

In any case, I agree with Bassam that a cb reference is not the kind of

hierarchical reference that affects portability. 

 

Also, I don't see how a reference to a cb makes it undesirable to

reference a property from a package. Or was that supposed to be a

benefit?

 

Dave

 

 

 

 

> -----Original Message-----

> From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org]

On

> Behalf Of Bassam Tabbara

> Sent: Tuesday, February 20, 2007 8:34 PM

> To: piper@cadence.com; Bassam.tabbara@synopsys.com; sv-ac@server.eda-

> stds.org

> Subject: Re: [sv-ac] 1547 review

> 

> Hi Lisa,

> 

> You declare them there to get the clocking and can always assert thru

cb's

> name.

> 

> THX.

> -Bassam

> 

> -----Original Message-----

> From: Lisa Piper <piper@cadence.com>

> To: Bassam Tabbara <Bassam.Tabbara@synopsys.COM>; sv-ac@eda-stds.org

<sv-

> ac@eda-stds.org>

> Sent: Tue Feb 20 20:02:07 2007

> Subject: RE: [sv-ac] 1547 review

> 

> Hi Bassam,

> 

> 

> 

> I guess I don't understand the use model.  When would you want to

define

> properties and sequences in a clocking block?  When would you do this

and

> not want to assert them?

> 

> 

> 

> Lisa

> 

> 

> 

> ________________________________

> 

> From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of

Bassam

> Tabbara

> Sent: Tuesday, February 20, 2007 10:17 PM

> To: sv-ac@eda-stds.org

> Subject: [sv-ac] 1547 review

> 

> 

> 

> The proposal seems fine but I disagree with what its objective. I

believe

> the clocking block is a declaration scope so it would be quite

inadequate

> to add executing statements into a construct intended to orthogonalize

> clocking/sampling definition (declaration) from structure/behavior.

> Putting asserts there is undesirable in my opinion, and would open the

> door to other statements.

> 

> Thx.

> 

> -Bassam.

> 

> 

> 

> 

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Received on Wed Feb 21 08:58:10 2007

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