RE: [sv-ac] P1800 SV-AC: vote on #1549

From: Korchemny, Dmitry <dmitry.korchemny_at_.....>
Date: Thu Oct 05 2006 - 01:43:08 PDT
Hi Shalom,

This is really misleading and LRM is vague on this subject. It is
written:

"Each formal argument has a data type that can be explicitly declared or
can inherit a default type."

In the declaration

function f (int i, j);

one can understand both that j has an explicit type j and that j should
use a default type.

Thanks for the reference. As I could see Ed is already monitoring it.

Dmitry

-----Original Message-----
From: Bresticker, Shalom 
Sent: Thursday, October 05, 2006 10:06 AM
To: Korchemny, Dmitry
Cc: sv-ac@server.eda.org
Subject: RE: [sv-ac] P1800 SV-AC: vote on #1549

See http://www.eda-twiki.org/mantis/bug_view_page.php?bug_id=0001340 .

Shalom

> -----Original Message-----
> From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org]
On
> Behalf Of Korchemny, Dmitry
> Sent: Thursday, October 05, 2006 8:42 AM
> To: john.havlicek@freescale.com; Eduard.Cerny@synopsys.com
> Cc: piper@cadence.com; Bassam.Tabbara@synopsys.com;
sv-ac@server.eda.org
> Subject: RE: [sv-ac] P1800 SV-AC: vote on #1549
> 
> One more issue is the backward compatibility. We had initially a
> discussion about interpreting parameter types in properties/sequences.
> E.g.,
> 
> sequence s(bit a, b);
> ...
> endsequence
> 
> One interpretation was that a is typed while b is untyped. The other
one
> (which won) was that both a and b are of type bit. But there were
people
> who wrote their property library according the first interpretation.
It
> is acceptable to request from them to change the implementation:
> 
> sequence s(bit a, implicit b);
> 
> but to change the usage
> 
> sequence s(b, bit a);
> 
> in unacceptable.
> 
> Thanks,
> Dmitry
Received on Thu Oct 5 01:43:42 2006

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