RE: [sv-ac] question on 966

From: Eduard Cerny <Eduard.Cerny_at_.....>
Date: Tue Jul 11 2006 - 06:06:49 PDT
Yes, but as 959 says - why is it not in generate if too? The test for $
will most likely be used in generate, at least as far as assertions go.
ed 

> -----Original Message-----
> From: owner-sv-ac@eda-stds.org 
> [mailto:owner-sv-ac@eda-stds.org] On Behalf Of Brad Pierce
> Sent: Monday, July 10, 2006 7:06 PM
> To: sv-ac@eda-stds.org
> Subject: Re: [sv-ac] question on 966
> 
> If it were a procedural-if, instead of a generate-if, then 
> the && could
> be replaced by a &&& (see 10.4.1.2). 
> 
> See also --
> 
>    http://www.eda-stds.org/svdb/bug_view_page.php?bug_id=959
> 
> -- Brad
> 
> -----Original Message-----
> From: Eduard Cerny 
> Sent: Monday, July 10, 2006 2:10 PM
> To: Brad Pierce; sv-ac@eda-stds.org
> Subject: RE: [sv-ac] question on 966
> 
> In view of Brad's comment, I guess the example would have to split the
> if expression into two if's.
> 
> ed
> 
> 
> > -----Original Message-----
> > From: owner-sv-ac@eda-stds.org 
> > [mailto:owner-sv-ac@eda-stds.org] On Behalf Of Brad Pierce
> > Sent: Monday, July 10, 2006 5:04 PM
> > To: sv-ac@eda-stds.org
> > Subject: Re: [sv-ac] question on 966
> > 
> > Short-circuiting of expressions is optional in Verilog, not 
> > mandatory.  
> > 
> >    http://www.boyd.com/1364_btf/report/full_pr/449.html
> > 
> > And the evaluation order for operands is unspecified.
> > 
> > -- Brad
> > 
> > -----Original Message-----
> > From: owner-sv-ac@eda-stds.org [mailto:owner-sv-ac@eda-stds.org] On
> > Behalf Of John Havlicek
> > Sent: Monday, July 10, 2006 1:58 PM
> > To: eduard.cerny@synopsys.COM
> > Cc: sv-ac@eda-stds.org
> > Subject: [sv-ac] question on 966
> > 
> > Ed:
> > 
> > I have a question about the restriction that a
> > parameter to which $ is assigned not be used in 
> > any expression.
> > 
> > In the example you have:
> > 
> >    generate
> >       if (!$isunbounded(max_quiet) && (max_quiet == 0)) begin
> >            ...
> >       end
> >       else begin
> >            ...
> >       end
> >       ...
> >    endgenerate
> > 
> > Is this really consistent with the restriction?  It looks to 
> > me as though
> > 
> >    !$isunbounded(max_quiet) && (max_quiet == 0)
> > 
> > is one big expression (the condition of the "if").  Also, are there
> > rules about early exit of the expression evaluation that 
> are in force
> > here so that if max_quiet is $, then you don't test whether $ == 0?
> > 
> > Best regards,
> > 
> > John H.
> > 
> > 
> 
> 
Received on Tue Jul 11 06:06:54 2006

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