RE: [sv-ac] 928 Proposal Updated

From: Korchemny, Dmitry <dmitry.korchemny_at_.....>
Date: Thu Jun 29 2006 - 14:32:58 PDT
Hi all,

I see the following problem with passing arguments by value. Suppose
that I want to write the following property:

property p(logic a, logic b);
	a |=> b;
endproperty

and to instantiate it as:

assert property (p(x, y)); where x and y were declared as bit. In this
case the type conversion will be performed and will slow down the
simulation.

It means that I have to maintain two sets of properties:

property p(logic a, logic b);
	a |=> b;
endproperty

property p(bit a, bit b);
	a |=> b;
endproperty

which is impractical. For property libraries it is a big issue.

Therefore, the explicit typing won't be used in practice, and the
property will be written as:

property p(a, b);
	a |=> b;
endproperty

Providing a type has the advantage of issuing clearer compilation
errors. E.g., instead of "a |=> b: a should be one bit long" we could
get:

"parameter a of property p: one bit value expected".

Thanks,
Dmitry

-----Original Message-----
From: owner-sv-ac@server.eda-stds.org
[mailto:owner-sv-ac@server.eda-stds.org] On Behalf Of Eduard Cerny
Sent: Thursday, June 29, 2006 6:29 PM
To: john.havlicek@freescale.com; Eduard.Cerny@synopsys.com
Cc: piper@cadence.com; Bassam.Tabbara@synopsys.com; Korchemny, Dmitry;
Brad.Pierce@synopsys.com; sv-ac@server.eda-stds.org
Subject: RE: [sv-ac] 928 Proposal Updated

John,

Yes, these examples are fine. It does type and range checking, but the
final effect is a substitution. No passing by reference or value is
needed. (By ref it would have to be "sequence s1(const ref logic [1:0]
v);"

ed


> -----Original Message-----
> From: John Havlicek [mailto:john.havlicek@freescale.com] 
> Sent: Thursday, June 29, 2006 11:17 AM
> To: Eduard.Cerny@synopsys.COM
> Cc: john.havlicek@freescale.com; Eduard.Cerny@synopsys.COM; 
> piper@cadence.com; Bassam.Tabbara@synopsys.COM; 
> dmitry.korchemny@intel.com; Brad.Pierce@synopsys.COM; 
> sv-ac@eda-stds.org
> Subject: Re: [sv-ac] 928 Proposal Updated
> 
> Hi Ed:
> 
> Here are some examples.
> 
>    sequence s1(logic [1:0] v);
>       v[0] ##1 v[1];
>    endsequence
> 
> Suppse that a is of type logic [4:0].
> I expect the following instances to be legal:
> 
>    s1(a[4:3])  // a[4] goes to v[1], a[3] goes to v[0]
>    s1(a[3])    // 1'b0 goes to v[1], a[3] goes to v[0]
>    s1(a[2:0])  // a[2] is truncated, a[1] goes to v[1], a[0] 
> goes to v[0]
> 
> I expect
> 
>    sequence s2(logic [1:0] v);
>       v[3] ##1 v[4];
>    endsequence
> 
> to yield a compilation error at the sequence declaration, 
> even though a passing by substitution might make sense for
> the instance
> 
>    s2(a[4:3])
> 
> What do you think?
> 
> J.H.
> 
> > X-MimeOLE: Produced By Microsoft Exchange V6.5.7226.0
> > Content-class: urn:content-classes:message
> > Date: Thu, 29 Jun 2006 06:02:40 -0700
> > Thread-Topic: [sv-ac] 928 Proposal Updated
> > Thread-Index: Acabb6tsSsyoq+H2SSSQnbQz0tXtQwADFlGQ
> > From: "Eduard Cerny" <Eduard.Cerny@synopsys.com>
> > Cc: <piper@cadence.com>, <Bassam.Tabbara@synopsys.com>,
> >         <dmitry.korchemny@intel.com>, <Brad.Pierce@synopsys.com>,
> >         <sv-ac@eda-stds.org>
> > X-OriginalArrivalTime: 29 Jun 2006 13:02:42.0070 (UTC) 
> FILETIME=[4E6DB360:01C69B7C]
> > 
> > Hi John,
> > 
> > no, I was thinking that if we leave the pass-by-value args 
> out, then all
> > is treated as substitution, because even if it is an int or 
> logic, by
> > substituting the epxression in the property you will get as 
> if passed by
> > reference. =20
> > 
> > ed
> > 
> > 
> > > -----Original Message-----
> > > From: John Havlicek [mailto:john.havlicek@freescale.com]=20
> > > Sent: Thursday, June 29, 2006 7:32 AM
> > > To: Eduard.Cerny@synopsys.COM
> > > Cc: john.havlicek@freescale.com; piper@cadence.com;=20
> > > Bassam.Tabbara@synopsys.COM; Eduard.Cerny@synopsys.COM;=20
> > > dmitry.korchemny@intel.com; Brad.Pierce@synopsys.COM;=20
> > > sv-ac@eda-stds.org
> > > Subject: Re: [sv-ac] 928 Proposal Updated
> > >=20
> > > Hi Ed:
> > >=20
> > > I think that sequence, property, and void arguments, as well
> > > as untyped, are passed by substitution.
> > >=20
> > > For other typed arguments, I think that we need to use the=20
> > > current LRM mechanism, which applies the assignement rules.
> > > I think of this like having an implicit wire for the formal
> > > argument in the declared sequence or property and assigning
> > > the actual argument expression to that wire.  As a result,=20
> > > the assignment rules for type coercion are used (e.g., truncation,
> > > padding).  If the type of the actual argument expression cannot=20
> > > be coerced to the type of the formal argument, then the compiler
> > > should reject the code.
> > >=20
> > > Is this what you have in mind?
> > >=20
> > > J.H.
> 
Received on Thu Jun 29 14:33:09 2006

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