Hi Ben, as far as I know (and use it in VCS), bind is the same as instantiation of the module, interface, program. Except that it is done from the "outside". ed > -----Original Message----- > From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On > Behalf Of vhdlcohen@aol.com > Sent: Saturday, February 04, 2006 12:02 AM > To: sv-ac@eda.org > Cc: hdlcohen@gmail.com > Subject: [sv-ac] Is a bound moudule allowed to drive values > or just read? > > It seems that 2 vendors have different interpretations on this. > From LRM: By binding a program to a module or an instance, > the program > becomes part of the bound object. > > > -------------------------------------------------------------- > ----------- > - > Ben Cohen Trainer, Consultant, Publisher (831) 345-1759 > http://www.vhdlcohen.com/ ben_ f rom _abv-sva.org > * Co-Author: SystemVerilog Assertions Handbook, 2005 ISBN > 0-9705394-7-9 > * Co-Author: Using PSL/SUGAR for Formal and Dynamic Verification 2nd > Edition, 2004, ISBN 0-9705394-6-0 > * Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn > 0-9705394-2-8 > * Component Design by Example ", 2001 isbn 0-9705394-0-1 > * VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn > 0-7923-8474-1 > * VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn > 0-7923-8115 > -------------------------------------------------------------- > ----------- > -------- > >Received on Sat Feb 4 06:19:59 2006
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