RE: [sv-ac] Proposal for change in disable iff

Hi All,

I would like to get back to the discussion of execution of pass action
block in case of vacuous/disabled success. After some discussion with
others, I think that it would be best if pass action block does not
execute in case of vacuous/disabled success by default. Later on we can
add a system task to enable it from the verilog code (just like
$asserton, $assertoff etc). The reason for this is that calling a system
task every time action block is entered is going to have performance hit
especially if the assertion remains disabled for long times or has lots
of vacuous successes.

I would like to get other's feedback on this as I would like to include
this in my proposal.

Thanks.
Manisha 

-----Original Message-----
From: John Havlicek [mailto:john.havlicek@freescale.com] 
Sent: Tuesday, January 24, 2006 6:30 AM
To: Kulshrestha, Manisha
Cc: sv-ac@eda.org
Subject: Re: [sv-ac] Proposal for change in disable iff

Manisha:

>   - Should pass action execute when a property gets disabled (disabled
> success) ?

I think the defined behavior should be that pass action does not execute
for a disabled attempt of a property.

A tool might provide a switch to enable actions for disabled properties.

>   - Should we consider name 'pre-emptive' success as that term is 
> already used for disable condition ?

I think "pre-empted" makes a little better grammatical sense.

J.H.

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> Hi,
>  
> I have attached the proposal for the change in the return type of 
> disable iff condition. Few things to consider are:
>   - Should pass action execute when a property gets disabled (disabled
> success) ?
>   - Should we consider name 'pre-emptive' success as that term is 
> already used for disable condition ?
>  
> I am goig to put it on Mantis also.
>  
> Thanks.
> Manisha
>