RE: [SPAM] - RE: [sv-ac] proposal for #241 (sampling and clocking blocks) - Email found in subject

From: Bassam Tabbara <Bassam_at_.....>
Date: Wed Apr 13 2005 - 09:27:11 PDT
Hi Manisha,

Yes it does. One more suggestion, may be add one more sentence to say
"design variables are sampled with  #1step sampling. If a variable ... "
SO the snippet below would change to:


... Design variables are sampled with #1step sampling. If a variable
used in an assertion is a clocking block input variable, the variable
must be sampled by the clocking block with #1step sampling. Any other
type of sampling for the variable in the clocking block shall result in
an error.
The assertion using the clocking block variable shall not do its own
sampling, but rather use the sampled value produced by the clocking
block. ... 

To complete the picture and be concrete.

Thx.
-Bassam.

--
Dr. Bassam Tabbara
Architect, R&D
Novas Software Inc.
(408) 467-7893

-----Original Message-----
From: Kulshrestha, Manisha [mailto:Manisha_Kulshrestha@mentor.com] 
Sent: Tuesday, April 12, 2005 3:29 PM
To: Bassam Tabbara; sv-ac@eda.org
Subject: [SPAM] - RE: [sv-ac] proposal for #241 (sampling and clocking
blocks) - Email found in subject

Hi Bassam,

Here is rewording of the same statement. 

... If a variable used in an assertion is a clocking block input
variable, the variable must be sampled by the clocking block with #1step
sampling. Any other type of sampling for the variable in the clocking
block shall result in an error.
The assertion using the clocking block variable shall not do its own
sampling, but rather use the sampled value produced by the clocking
block. ... 

Please let me know if this removes the contradiction you found in the
previous statement.

Thanks.
Manisha

-----Original Message-----
From: Bassam Tabbara [mailto:Bassam@novas.com]
Sent: Tuesday, April 12, 2005 2:55 PM
To: Kulshrestha, Manisha; sv-ac@eda.org
Subject: RE: [sv-ac] proposal for #241 (sampling and clocking blocks)

Hi Manisha,

The language could use some cleanup ...  To a casual reading it seems as
if the following is a contradiction so some elaboration is needed:

... If a variable used in an assertion is a clocking block input
variable, the variable shall be sampled with #1step sampling. Any other
type of sampling for the clocking block variable shall result in an
error. The clocking block input variables shall be sampled as per the
clocking block and there shall not be any sampling for them in the
assertion. ...

I think you mean to express the *input skew* is #1step regardless of
clocking block and the other point (in second seemingly contradictory
sentence) you mean to express the scheduling aspects ... If I understand
correctly.

Thx.
-Bassam.

--
Dr. Bassam Tabbara
Architect, R&D
Novas Software Inc.
(408) 467-7893

-----Original Message-----
From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of
Kulshrestha, Manisha
Sent: Monday, April 11, 2005 3:00 PM
To: sv-ac@eda.org
Subject: [sv-ac] proposal for #241 (sampling and clocking blocks)

Hi All,

I have uploaded the modified proposal for 241.
The mantis id for it is #626.
This one is based on our discussion in the meeting. Please send me your
comments.

Thanks.
Manisha
Received on Wed Apr 13 09:27:14 2005

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