RE: [sv-ac] RE: SystemVerilog Draft4.0 access

Hi Johny,
 
  I have been participating the SV-AC and attending meetings, while I
only have Draft3.0. 
  Could you also grant me the access to the Draft4.0 of P1800 ? 
 
Thanks,
 
--Joseph
 

Joseph Lu, Ph.D. 
nVIDIA Corp
2701 San Tomas Expressway , MS 12
Santa Clara, CA 95050
408-486-8899
jlu@nvidia.com 

 

________________________________

From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of
Johny Srouji
Sent: Sunday, April 03, 2005 9:30 AM
To: john.havlicek@freescale.com; bassam@novas.com
Cc: sv-ac@eda.org; Karen.Pieper@synopsys.com; Johny Srouji
Subject: [sv-ac] RE: SystemVerilog Draft4.0 access



John, Bassam, 

I decided to grant you access to the drafts and got clearance for this
exception from the IEEE. I will send you the link and password for
downloading Draft4.0 of P1800 SystemVerilog directly to your email
accounts. 

Regards, 

--- Johny. 





Johny Srouji/Austin/IBM 

04/01/2005 05:15 PM 

To
<bassam@novas.com>, john.havlicek@freescale.com 
cc
"'Eduard Cerny'" <Eduard.Cerny@synopsys.com>, fhaque@cisco.com,
john.havlicek@freescale.com, "'Karen Pieper'"
<Karen.Pieper@synopsys.com>, owner-sv-ac@eda.org,
Surrendra.Dudani@synopsys.com, sv-ac@eda.org 
Subject
RE: [sv-ac] FW: P1800 AC issuesLink
<Notes:///87256F66001C2D2F/38D46BF5E8F08834852564B500129B2C/1A3C4E42F032
F30787256FD600671A7B> 

	



Hi All, 

I've seen this thread on sv-ac and as it's becoming an issue, I decided
to send a clarification note to all. 

First, I'd like to provide some background to this: A note titled
"SystemVerilog (P1800) and Verilog (P1364) Draft Documents Available"
was sent on 1/17 to all technical committees to notify that documents
for SystemVerilog and Verilog were available for download and review
under eda.org. It explained that in order to keep w/ IEEE-SA staff
directives to protect the IP rights of the IEEE, these draft documents
are password  and a password was sent to the WG DR. It also mentioned
that if an entity is not an IEEE-SA Corporate member that has membership
credentials in the SystemVerilog Working Group, it will need to make a
request to the chair (myself), so that I can check a possible exemption
for this policy. 

At this stage of the process, I must also check w/ IEEE on exceptions
that I decide to make (i.e. after I am convinced an exception should be
made). 

In this case, as Freescale and Novas are part of the issues resolution
committee (and both have been active contributing members of sv-ac for a
long time), I see a good reason why John and Bassam need to have access
to the draft. Having said that, I still need to check w/ IEEE and get
clearance for this. 

I'll get back to you on this. 

Regards, 

--- Johny. 






"Bassam Tabbara" <bassam@novas.com> 
Sent by: owner-sv-ac@eda.org 

04/01/2005 12:43 PM 
Please respond to
bassam


To
"'Eduard Cerny'" <Eduard.Cerny@synopsys.com>,
<john.havlicek@freescale.com> 
cc
<sv-ac@eda.org>, <fhaque@cisco.com>, <Surrendra.Dudani@synopsys.com>,
"'Karen Pieper'" <Karen.Pieper@synopsys.com> 
Subject
RE: [sv-ac] FW: P1800 AC issues

	




Ed, FYI, I (suspect also John) don't even have D4, D3 was the last
"distributed" LRM as far as I know. 

I don't want to make a big deal out of this (so please no far-reaching
emails), but just in case anyone is in the same boat as I, there seems
to be
an issue with getting the LRM if you're not on IEEE-SA. I've put a
tracer on
this (request to Johny/Karen), also Novas is trying to get the LRM
through
Accellera (itself an IEEE-SA entity, Dennis working on this I believe),
but
apparently we can purchase a copy from IEEE (tracking this...). 

** I promise to share the info with all if you're not a member
(individual
or company) of IEEE-SA. If you are then no prob just get in touch with
your
DR.

Thx.
-Bassam. 


--
Dr. Bassam Tabbara
Architect, R&D
Novas Software, Inc.
(408) 467-7893

-----Original Message-----
From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of
Eduard
Cerny
Sent: Friday, April 01, 2005 10:29 AM
To: john.havlicek@freescale.com; Eduard.Cerny@synopsys.com
Cc: sv-ac@eda.org; fhaque@cisco.com; Surrendra.Dudani@synopsys.com;
'Karen
Pieper'
Subject: RE: [sv-ac] FW: P1800 AC issues

Actually that is a good question because i have D4 only, it is not the
last
I believe. Perhaps Faisal or Karen can help.

ed


> -----Original Message-----
> From: John Havlicek [mailto:john.havlicek@freescale.com]
> Sent: Friday, April 01, 2005 11:13 AM
> To: Eduard.Cerny@synopsys.COM
> Cc: sv-ac@eda.org; fhaque@cisco.com;
> Surrendra.Dudani@synopsys.COM; Eduard.Cerny@synopsys.COM
> Subject: Re: [sv-ac] FW: P1800 AC issues
> 
> Ed:
> 
> Where is the latest draft of the LRM?  I will look at #217 and #128 
> when I know where to find the draft.
> 
> Best regards,
> 
> John H.
>